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臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)
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Institution Date Title Author
臺大學術典藏 2019-10-24T08:24:32Z PSN-aware Circuit Test Timing Prediction using Machine Learning CHIEN-MO LI;J. C.M. Li;B. Liu; B. Liu; J. C.M. Li; CHIEN-MO LI
臺大學術典藏 2019-10-24T08:24:32Z PSN-aware Circuit Test Timing Prediction using Machine Learning CHIEN-MO LI;J. C.M. Li;B. Liu; B. Liu; J. C.M. Li; CHIEN-MO LI
臺大學術典藏 2018-09-10T15:00:42Z Flexible TFT Circuit Analyzer Considering Process Variation, Aging, and Bending Effects E. H. Ma;W. E. Wei;H. Y. Li;J. C. M. Li;I. C. Cheng;Y. H. Yeh; E. H. Ma; W. E. Wei; H. Y. Li; J. C. M. Li; I. C. Cheng; Y. H. Yeh; I-CHUN CHENG; CHIEN-MO LI
臺大學術典藏 2018-09-10T15:00:42Z Flexible TFT Circuit Analyzer Considering Process Variation, Aging, and Bending Effects E. H. Ma;W. E. Wei;H. Y. Li;J. C. M. Li;I. C. Cheng;Y. H. Yeh; E. H. Ma; W. E. Wei; H. Y. Li; J. C. M. Li; I. C. Cheng; Y. H. Yeh; I-CHUN CHENG; CHIEN-MO LI
臺大學術典藏 2018-09-10T15:00:42Z Physical-aware Systematic Multiple Defect Diagnosis P. J. Chen;C. C. Che;J. C. M. Li;S. F. Kuo;P. Y. Hsueh;C. Y. Kuo;J. N. Lee; P. J. Chen; C. C. Che; J. C. M. Li; S. F. Kuo; P. Y. Hsueh; C. Y. Kuo; J. N. Lee; CHIEN-MO LI
臺大學術典藏 2018-09-10T15:00:42Z Physical-aware Systematic Multiple Defect Diagnosis P. J. Chen;C. C. Che;J. C. M. Li;S. F. Kuo;P. Y. Hsueh;C. Y. Kuo;J. N. Lee; P. J. Chen; C. C. Che; J. C. M. Li; S. F. Kuo; P. Y. Hsueh; C. Y. Kuo; J. N. Lee; CHIEN-MO LI
臺大學術典藏 2018-09-10T15:00:42Z Detect RRAM Defects in The Early Stage During Rnv8T Nonvolatile SRAM Testing B.C. Bai;C.A. Chen;J C.M Li; B.C. Bai; C.A. Chen; J C.M Li; CHIEN-MO LI
臺大學術典藏 2018-09-10T15:00:42Z Detect RRAM Defects in The Early Stage During Rnv8T Nonvolatile SRAM Testing B.C. Bai;C.A. Chen;J C.M Li; B.C. Bai; C.A. Chen; J C.M Li; CHIEN-MO LI
臺大學術典藏 2018-09-10T15:00:42Z Power-Supply-Noise-Aware Dynamic Timing Analyzer for 3D IC H.Y. Hsieh;J. C.-M. Li; H.Y. Hsieh; J. C.-M. Li; CHIEN-MO LI
臺大學術典藏 2018-09-10T15:00:42Z Power-Supply-Noise-Aware Dynamic Timing Analyzer for 3D IC H.Y. Hsieh;J. C.-M. Li; H.Y. Hsieh; J. C.-M. Li; CHIEN-MO LI
臺大學術典藏 2018-09-10T15:00:42Z GALAXY: A Multi-Circuit Simulator based on Inverse Jacobian Matrix Reuse H.Y. Lee;C.Y. Han;J. C.-M. Li; H.Y. Lee; C.Y. Han; J. C.-M. Li; CHIEN-MO LI
臺大學術典藏 2018-09-10T15:00:42Z GALAXY: A Multi-Circuit Simulator based on Inverse Jacobian Matrix Reuse H.Y. Lee;C.Y. Han;J. C.-M. Li; H.Y. Lee; C.Y. Han; J. C.-M. Li; CHIEN-MO LI
臺大學術典藏 2018-09-10T15:00:42Z GPU-Based Timing-Aware Test Generation for Small Delay Defects K.Y. Liao;J. C.-M. Li;M. Hsiao; K.Y. Liao; J. C.-M. Li; M. Hsiao; CHIEN-MO LI
臺大學術典藏 2018-09-10T15:00:42Z GPU-Based Timing-Aware Test Generation for Small Delay Defects K.Y. Liao;J. C.-M. Li;M. Hsiao; K.Y. Liao; J. C.-M. Li; M. Hsiao; CHIEN-MO LI
臺大學術典藏 2018-09-10T15:00:41Z Simultaneous Optimization of Analog Circuits With Reliability and Variability for Applications on Flexible Electronics Y. L. Chen;W. R. Wu;C. N. J. Liu;J. C. M. Li; Y. L. Chen; W. R. Wu; C. N. J. Liu; J. C. M. Li; CHIEN-MO LI
臺大學術典藏 2018-09-10T15:00:41Z Simultaneous Optimization of Analog Circuits With Reliability and Variability for Applications on Flexible Electronics Y. L. Chen;W. R. Wu;C. N. J. Liu;J. C. M. Li; Y. L. Chen; W. R. Wu; C. N. J. Liu; J. C. M. Li; CHIEN-MO LI
臺大學術典藏 2018-09-10T15:00:41Z Testing of TSV-induced Small Delay Faults for Three Dimensional Integrated Circuits C.Y. Kuo;C. J. Shih;J. C. M. Li;K. Chakrabarty; C.Y. Kuo; C. J. Shih; J. C. M. Li; K. Chakrabarty; YI-CHANG LU; CHIEN-MO LI
臺大學術典藏 2018-09-10T15:00:41Z Testing of TSV-induced Small Delay Faults for Three Dimensional Integrated Circuits C.Y. Kuo;C. J. Shih;J. C. M. Li;K. Chakrabarty; C.Y. Kuo; C. J. Shih; J. C. M. Li; K. Chakrabarty; YI-CHANG LU; CHIEN-MO LI
臺大學術典藏 2018-09-10T09:50:54Z Compact Test Pattern Selection for Small Delay Defect J. Y. Chang;K. Y. Liao;S. C. Hsu;J. C. M. Li;J. C. Rau; J. Y. Chang; K. Y. Liao; S. C. Hsu; J. C. M. Li; J. C. Rau; CHIEN-MO LI
臺大學術典藏 2018-09-10T09:50:54Z Compact Test Pattern Selection for Small Delay Defect J. Y. Chang;K. Y. Liao;S. C. Hsu;J. C. M. Li;J. C. Rau; J. Y. Chang; K. Y. Liao; S. C. Hsu; J. C. M. Li; J. C. Rau; CHIEN-MO LI
臺大學術典藏 2018-09-10T09:50:53Z Test Clock Domain Optimization to Avoid Scan Shift Failures due to Flip-flop Simultaneous Triggering Y. C. Huang;M. H. Tsai;W. S. Ding;J. C. M. Li;M. T. Chang;M. H. Tsai;C. M. Tseng;H. C. Li; Y. C. Huang; M. H. Tsai; W. S. Ding; J. C. M. Li; M. T. Chang; M. H. Tsai; C. M. Tseng; H. C. Li; CHIEN-MO LI
臺大學術典藏 2018-09-10T09:50:53Z Test Clock Domain Optimization to Avoid Scan Shift Failures due to Flip-flop Simultaneous Triggering Y. C. Huang;M. H. Tsai;W. S. Ding;J. C. M. Li;M. T. Chang;M. H. Tsai;C. M. Tseng;H. C. Li; Y. C. Huang; M. H. Tsai; W. S. Ding; J. C. M. Li; M. T. Chang; M. H. Tsai; C. M. Tseng; H. C. Li; CHIEN-MO LI
臺大學術典藏 2018-09-10T09:25:32Z Systematic Open Via Diagnosis Based on Physical Features P. J. Chen; C. C. Che; J. C. M. Li; K. Y. Tsai; S. F. Kuo; P. Y. Hsueh; Y. Y. Chen; J. N. Lee; CHIEN-MO LI
臺大學術典藏 2018-09-10T09:25:31Z Structural Reduction Techniques for Logic-Chain Bridging Fault Diagnosis W.L. Tsai; J. C.M. Li; CHIEN-MO LI
臺大學術典藏 2018-09-10T09:25:31Z Thermal-aware Test Schedule and TAM Co-Optimization for Three Dimensional IC C. J. Shih;C. Y. Hsu;C. Y. Kou;J. C. M. Li;J. C. Rau;K. Chakrabarty; C. J. Shih; C. Y. Hsu; C. Y. Kou; J. C. M. Li; J. C. Rau; K. Chakrabarty; CHIEN-MO LI

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