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Institution Date Title Author
臺大學術典藏 2018-09-10T07:41:38Z Low-Voltage CMOS VLSI Circuits J. B. Kuo; J. H. Lou; JAMES-B KUO
臺大學術典藏 2018-09-10T07:41:35Z A Low-Voltage Semi-Dynamic DCVSPG-Domino Logic Circuit J. H. Lou; J. B. Kuo; JAMES-B KUO
臺大學術典藏 1999-05 A 1.5-V CMOS all-N-logic true-single-phase bootstrapped dynamic-logic circuit suitable for low supply voltage and high-speed pipelined system operation J. H. Lou; J. B. Kuo; JAMES-B KUO
臺大學術典藏 0-01 A High-Speed 1.5V Clocked BiCMOS Latch for BiCMOS Dynamic Pipelined Digital Logic VLSI Systems J. B. Kuo;J. H. Lou; J. B. Kuo; J. H. Lou; JAMES-B KUO
臺大學術典藏 0-01 A High-Speed 1.5V Clocked BiCMOS Latch for BiCMOS Dynamic Pipelined Digital Logic VLSI Systems J. B. Kuo;J. H. Lou; J. B. Kuo; J. H. Lou; JAMES-B KUO

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