臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)

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"j j tang"

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Showing items 16-29 of 29 (1 Page(s) Totally)
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Institution	Date	Title	Author
南台科技大學	1997-09	Track assignment algorithm for an FPGA with hierarchical interconnection structure	B. T. Wang; J. J. Tang
南台科技大學	1997-09	An IDDQ testable design for PLA	J. J. Tang
南台科技大學	1997-04	An IDDQ testable design for PLA.	J. J. Tang
南台科技大學	1997-03	A case study on using writing conferences and peer-group review in teaching English composition in senior high school	J. J. Tang; L. M. Huang
南台科技大學	1996-09	Low test-application time method for EEPLA testing	B. D. Liu; K. C. Wei; J. J. Tang;唐經洲; Jing-Jou Tang
南台科技大學	1996-01	Two modeling techniques for CMOS Circuits to enhance test generation and fault simulation for bridging faults	K. J. Lee; J. J. Tang; 唐經洲
南台科技大學	1995-05	An IDDQ fault model to facilitate the design of built-in current sensor (BICSs)	B. D. Liu; J. J. Tang; K. J. Lee
南台科技大學	1994-08	Bulit-in intermediate voltage testing for CMOS circuits	K. J. Lee; J. J. Tang
南台科技大學	1994-08	EDEn- An integrated mixed-mode IC design environment	Y. M. Lin; M. C. Jiang; W. Y. Lin; W. T. Chen; M. C. Hsiao; J. J. Tang; M. J. Wu; W. H. Luo; H. T. Chung; J. H. Chen; S. C. Liau
南台科技大學	1994-01	Physical fault consideration of test pattern generation for large embeeded PLAs	B. D. Liu; J. J. Tang; K. J. Lee
南台科技大學	1993-09	A real time IDDQ testing scheme using current conveyor technique	J. J. Tang; K.J. Lee; B.D. Liu
南台科技大學	1993-09	Maximal fault diagnosis resolution for programmable logic array	B. D. Liu; J. J. Tang; K. J. Lee
南台科技大學	1993-09	An efficient algorithm to obtain both bipartite row and column folding results of a PLA.	K. C. Wei; B. D. Liu; J. J. Tang
南台科技大學	1993-08	A new current sensing technique for IDDQ testing	J. J. Tang; K. J. Lee; B. D. Liu

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