|
English
|
正體中文
|
简体中文
|
Total items :2856704
|
|
Visitors :
53731893
Online Users :
1066
Project Commissioned by the Ministry of Education
Project Executed by National Taiwan University Library
|
|
|
|
Taiwan Academic Institutional Repository >
Browse by Author
|
"king ku jei"
Showing items 1-6 of 6 (1 Page(s) Totally)
1
View [10|25|50] records per page
| 臺大學術典藏 |
2020-05-04T07:27:51Z |
Hierarchical value cache encoding for off-chip data bus.
|
Lin, Chung-Hsiang; Yang, Chia-Lin; King, Ku-Jei; CHIA-LIN YANG |
| 臺大學術典藏 |
2020-05-04T07:27:49Z |
PPT: joint performance/power/thermal management of DRAM memory for multi-core systems.
|
Lin, Chung-Hsiang;Yang, Chia-Lin;King, Ku-Jei; Lin, Chung-Hsiang; Yang, Chia-Lin; King, Ku-Jei; CHIA-LIN YANG |
| 臺大學術典藏 |
2018-07-05T01:53:24Z |
Hierarchical Value Cache Encoding for Off-Chip Data Bus
|
King, Ku-Jei; Yang, Chia-Lin; Lin, Chung-Hsiang; Lin, Chung-Hsiang; Yang, Chia-Lin; King, Ku-Jei |
| 國立臺灣大學 |
2007 |
Energy-Efficient Real-Time Task Scheduling with Task Rejection
|
Chen, Jian-Jia; Kuo, Tei-Wei; Yang, Chia-Lin; King, Ku-Jei |
| 臺大學術典藏 |
2007 |
Energy-Efficient Real-Time Task Scheduling with Task Rejection
|
Chen, Jian-Jia; Kuo, Tei-Wei; Yang, Chia-Lin; King, Ku-Jei; Chen, Jian-Jia; Kuo, Tei-Wei; Yang, Chia-Lin; King, Ku-Jei |
| 國立臺灣大學 |
2006 |
Hierarchical Value Cache Encoding for Off-Chip Data Bus
|
Lin, Chung-Hsiang; Yang, Chia-Lin; King, Ku-Jei |
Showing items 1-6 of 6 (1 Page(s) Totally)
1
View [10|25|50] records per page
|
