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Showing items 1-4 of 4 (1 Page(s) Totally) 1 View [10|25|50] records per page
| 國立臺灣大學 |
1995-11 |
Fast fault simulation for BIST applications
|
Kung, Chen-Pin; Huang, Chun-Jieh; Lin, Chen-Shang |
| 國立臺灣大學 |
1993-02 |
Test time reduction in scan designed circuits
|
Lai, Wen-Joung; Kung, Chen-Pin; Lin, Chen-Shang |
| 國立臺灣大學 |
1992-03 |
Parallel sequence fault simulation for synchronous sequential circuits
|
Kung, Chen-Pin; Lin, Chen-Shang |
| 國立臺灣大學 |
1991-05 |
Parallel sequence fault simulation for synchronous sequential circuits
|
Kung, Chen-Pin; Lin, Chen-Shang |
Showing items 1-4 of 4 (1 Page(s) Totally) 1 View [10|25|50] records per page
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