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"kuo j b"
Showing items 101-110 of 128 (13 Page(s) Totally) << < 4 5 6 7 8 9 10 11 12 13 > >> View [10|25|50] records per page
| 國立臺灣大學 |
1992-10 |
Delayed-turn-on phenomenon in accumulation-type SOI pMOS device operating at liquid nitrogen temperature
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Kuo, J.B.; Sim, J.H. |
| 臺大學術典藏 |
1992-10 |
A BiCMOS dynamic full adder circuit for VLSI implementation of high-speed parallel multipliers using Wallace tree reduction architecture
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Kuo, J.B.; Liao, H.J.; Chen, H.P.; Kuo, J.B.; Liao, H.J.; Chen, H.P.; KuoJB |
| 臺大學術典藏 |
1992-10 |
Delayed-turn-on phenomenon in accumulation-type SOI pMOS device operating at liquid nitrogen temperature
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Kuo, J.B.; Sim, J.H.; Kuo, J.B.; Sim, J.H.; KuoJB |
| 國立臺灣大學 |
1992-07 |
Simple analytical model for short-channel MOS devices
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Chow, H.-C.; Feng, W.-S.; Kuo, J.B. |
| 國立臺灣大學 |
1992-06 |
BiCMOS dynamic full adder circuit for high-speed parallel multipliers
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Chen, H.P.; Liao, H.J.; Kuo, J.B. |
| 國立臺灣大學 |
1992-06 |
A radical-partitioned coded block adaptive neural network structure for large-volume Chinese characters recognition
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Kuo, J.B.; Mao, M.W. |
| 臺大學術典藏 |
1992-06 |
A radical-partitioned coded block adaptive neural network structure for large-volume Chinese characters recognition
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Kuo, J.B.; Mao, M.W.; Kuo, J.B.; Mao, M.W.; KuoJB |
| 國立臺灣大學 |
1992-02 |
BiCMOS dynamic Manchester carry look ahead circuit for high speed arithmetic unit VLSI
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Kuo, J.B.; Liao, H.J.; Chen, H.P. |
| 臺大學術典藏 |
1992-02 |
BiCMOS dynamic Manchester carry look ahead circuit for high speed arithmetic unit VLSI
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Kuo, J.B.; Liao, H.J.; Chen, H.P.; KuoJB; Kuo, J.B.; Liao, H.J.; Chen, H.P. |
| 國立臺灣大學 |
1991-12 |
Analogue adaptive neural network circuit
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Chiang, M.L.; Lu, T.C.; Kuo, J.B. |
Showing items 101-110 of 128 (13 Page(s) Totally) << < 4 5 6 7 8 9 10 11 12 13 > >> View [10|25|50] records per page
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