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Taiwan Academic Institutional Repository >
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"kuo j b"
Showing items 66-75 of 128 (13 Page(s) Totally)
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| 國立臺灣大學 |
1995-09 |
A high-speed 1.5 V clocked BiCMOS latch for BiCMOS dynamic pipelined digital logic VLSI systems
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Kuo, J.B.; Lou, J.H.; Su, K.W. |
| 臺大學術典藏 |
1995-09 |
A high-speed 1.5 V clocked BiCMOS latch for BiCMOS dynamic pipelined digital logic VLSI systems
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Kuo, J.B.; Lou, J.H.; Su, K.W.; Kuo, J.B.; Lou, J.H.; Su, K.W.; KuoJB |
| 國立臺灣大學 |
1995-05 |
A closed-form physical back-gate-bias dependent quasi-saturation model for SOI lateral DMOS devices with self-heating for circuit simulation
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Liu, C.M.; Shone, F.C.; Kuo, J.B. |
| 國立臺灣大學 |
1994-12 |
A 1.5 V 10 MHz BiCMOS quasi-digital vector modulator for wireless communication IC
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Su, K.W.; Chen, Y.G.; Lai, C.S.; Kuo, J.B.; Wu, J.S.; Tso, H.W. |
| 國立臺灣大學 |
1994-10 |
Back gate bias dependent quasi-saturation in a high-voltage SOI MOSFET: 2D analysis and closed-form analytical model
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Liu, C.M.; Kuo, J.B. |
| 國立臺灣大學 |
1994-08 |
A 1.5 V BiCMOS dynamic subtracter circuit for low-voltage BiCMOS CPU VLSI
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Chen, Y.G.; Kuo, J.B. |
| 國立臺灣大學 |
1994-07 |
A radical-partitioned neural network system using a modified Sigmoid function and a weight-dotted radical selector for large-volume Chinese characters recognition VLSI
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Kuo, J.B.; Chen, B.Y.; Mao, M.W. |
| 臺大學術典藏 |
1994-07 |
A radical-partitioned neural network system using a modified Sigmoid function and a weight-dotted radical selector for large-volume Chinese characters recognition VLSI
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Kuo, J.B.; Chen, B.Y.; Mao, M.W.; Kuo, J.B.; Chen, B.Y.; Mao, M.W.; KuoJB |
| 國立臺灣大學 |
1994-06 |
A BiCMOS dynamic multiplier using Wallace tree reduction architecture and 1.5 V full-swing BiCMOS dynamic logic circuit
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Kuo, J.B.; Su, K.W.; Lou, J.H. |
| 臺大學術典藏 |
1994-06 |
A BiCMOS dynamic multiplier using Wallace tree reduction architecture and 1.5 V full-swing BiCMOS dynamic logic circuit
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Kuo, J.B.; Su, K.W.; Lou, J.H.; Kuo, J.B.; Su, K.W.; Lou, J.H.; KuoJB |
Showing items 66-75 of 128 (13 Page(s) Totally)
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