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Showing items 121-128 of 128 (6 Page(s) Totally)
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| 臺大學術典藏 |
1991-06 |
A structured adaptive neural network for pattern recognition VLSI
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Kuo, J.B.; Wong, E.J.; Chen, C.C.; Hsiao, C.C.; Kuo, J.B.; Wong, E.J.; Chen, C.C.; Hsiao, C.C.; KuoJB |
| 國立臺灣大學 |
1991-05 |
Device-level analysis of a 1 μm BiCMOS inverter circuit operating at 77 K using a modified PISCES program
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Kuo, J.B.; Chen, Y.W.; Lou, K.H. |
| 國立臺灣大學 |
1991-05 |
A BiCMOS image sensor with a chopper-stabilized edge detector and a correlated-double-sampling readout circuit for neural network VLSI operating at 77 K
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Chou, T.L.; Wong, E.J.; Lee, W.C.; Kuo, J.B. |
| 國立臺灣大學 |
1991-05 |
A coded block adaptive neural network structure for pattern recognition VLSI
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Kuo, J.B.; Chen, Y.K.; Lu, Y.H.; Mao, W.C. |
| 臺大學術典藏 |
1991-05 |
Device-level analysis of a 1 μm BiCMOS inverter circuit operating at 77 K using a modified PISCES program
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Kuo, J.B.; Chen, Y.W.; Lou, K.H.; Kuo, J.B.; Chen, Y.W.; Lou, K.H.; KuoJB |
| 臺大學術典藏 |
1991-05 |
A coded block adaptive neural network structure for pattern recognition VLSI
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Kuo, J.B.; Chen, Y.K.; Lu, Y.H.; Mao, W.C.; KuoJB; Kuo, J.B.; Chen, Y.K.; Lu, Y.H.; Mao, W.C |
| 國立臺灣大學 |
1990 |
An Improved Analytical Model of Short Channel MOSFETs Suitable for Circuit Simulation
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Chow, H. C.; Wang, J. H.; Kuo, J, B.; 馮武雄; Chow, H. C.; Wang, J. H.; Kuo, J, B.; Feng, Wu-Shiung |
| 國立臺灣大學 |
1989-09 |
Performance analysis of a BiNMOS device
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Kuo, J.B.; Rosseel, G.P.; Dutton, R.W. |
Showing items 121-128 of 128 (6 Page(s) Totally)
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