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Taiwan Academic Institutional Repository >
Browse by Author
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"kuo j b"
Showing items 51-60 of 128 (13 Page(s) Totally)
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| 國立臺灣大學 |
1999 |
Bandgap Narrowing
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Kuo, J. B. |
| 國立臺灣大學 |
1999 |
A CMOS Semi-Static Latch Circuit without Charge Sharing and Leakage Current Problems
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Lin, P. F.; Kuo, J. B. |
| 國立臺灣大學 |
1999 |
A Low-Voltage Semi-Dynamic DCVSPG-Domino Logic Circuit
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Lou, J. H.; Kuo, J. B. |
| 國立臺灣大學 |
1999 |
Modeling of Deep-Submicron SOI CMOS VLSI Devices
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Kuo, J. B. |
| 國立臺灣大學 |
1998-09 |
1.5 V CMOS bootstrapped dynamic logic circuit techniques (BDLCT) suitable for low-voltage deep-submicron CMOS VLSI for implementing 482 MHz digital quadrature modulator and adder
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Lou, J.H.; Kuo, J.B. |
| 國立臺灣大學 |
1997-10 |
Compact current model for mesa-isolated fully-depleted ultrathin SOI NMOS devices considering sidewall-related narrow channel effects
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Kuo, J.B.; Su, K.W. |
| 臺大學術典藏 |
1997-10 |
Compact current model for mesa-isolated fully-depleted ultrathin SOI NMOS devices considering sidewall-related narrow channel effects
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Kuo, J.B.; Su, K.W.; Kuo, J.B.; Su, K.W.; KuoJB |
| 國立臺灣大學 |
1997-08 |
A 1.5 V CMOS high-speed 16-bit÷8-bit divider using the quotient-select architecture and true-single-phase bootstrapped dynamic circuit techniques suitable for low-voltage VLSI
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Yeh, C.C.; Lou, J.H.; Kuo, J.B. |
| 國立臺灣大學 |
1997-08 |
A 1.5 V bootstrapped pass-transistor-based carry look-ahead circuit suitable for low-voltage CMOS VLSI
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Lou, J.H.; Kuo, J.B. |
| 國立臺灣大學 |
1997-07 |
1.5 V CMOS full-swing energy efficient logic (EEL) circuit suitable for low-voltage and low-power VLSI applications
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Yeh, C.C.; Lou, J.H.; Kuo, J.B. |
Showing items 51-60 of 128 (13 Page(s) Totally)
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