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"kuo j b"
Showing items 91-100 of 128 (13 Page(s) Totally)
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| 臺大學術典藏 |
1993-08 |
Analytical drain current model for a-Si:H TFTs by simultaneously considering localised deep and tail states
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Kuo, J.B.; Chen, C.S.; Kuo, J.B.; Chen, C.S.; KuoJB |
| 國立臺灣大學 |
1993-05 |
A BiCMOS dynamic divider circuit using a nonrestoring iterative architecture with carry look ahead for CPU VLSI
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Kuo, J.B.; Chen, H.P.; Huang, H.J. |
| 國立臺灣大學 |
1993-05 |
Accumulation-type vs. inversion-type of an ultra-thin SIO PMOS device operating at 300 K and 77 K: subthreshold behavior and pull-up switching performance of a CMOS inverter
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Kuo, J.B.; Sim, J.H. |
| 國立臺灣大學 |
1993-05 |
A coded block neural network system suitable for VLSI implementation using an adaptive learning-rate epoch-based back propagation technique
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Mao, M.W.; Chen, B.Y.; Kuo, J.B. |
| 臺大學術典藏 |
1993-05 |
A BiCMOS dynamic divider circuit using a nonrestoring iterative architecture with carry look ahead for CPU VLSI
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Kuo, J.B.; Chen, H.P.; Huang, H.J.; Kuo, J.B.; Chen, H.P.; Huang, H.J.; KuoJB |
| 臺大學術典藏 |
1993-05 |
Accumulation-type vs. inversion-type of an ultra-thin SIO PMOS device operating at 300 K and 77 K: subthreshold behavior and pull-up switching performance of a CMOS inverter
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Kuo, J.B.; Sim, J.H.; Kuo, J.B.; Sim, J.H.; KuoJB |
| 國立臺灣大學 |
1993-03 |
BiCMOS dynamic minimum circuit using a parallel comparison algorithm for fuzzy controllers
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Chen, S.S.; Chiang, C.S.; Su, K.W.; Kuo, J.B. |
| 國立臺灣大學 |
1993 |
An Improved Analytical Short-Channel MOSFET Model Valid in All Regions of Operation for Analog/Digital Circuit Si[20642:0:4] 50300022:31:An Improved Analytical Short-Channel MOSFET Model Valid in All Regions of Operation for Analog/Digit
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Chow, H. C.; 馮武雄; Kuo, J. B.; Chow, H. C.; Feng, Wu-Shiung; Kuo, J. B. |
| 國立臺灣大學 |
1992-10 |
Coded block neural network VLSI system using an adaptive learning-rate technique to train Chinese character patterns
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Chen, B.Y.; Mao, M.W.; Kuo, J.B. |
| 國立臺灣大學 |
1992-10 |
A BiCMOS dynamic full adder circuit for VLSI implementation of high-speed parallel multipliers using Wallace tree reduction architecture
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Kuo, J.B.; Liao, H.J.; Chen, H.P. |
Showing items 91-100 of 128 (13 Page(s) Totally)
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