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"kuo po yi"的相关文件
显示项目 11-35 / 41 (共2页)
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| 國立交通大學 |
2019-04-02T05:58:50Z |
Investigation of low operation voltage InZnSnO thin-film transistors with different high-k gate dielectric by physical vapor deposition
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Ruan, Dun-Bao; Liu, Po-Tsun; Chiu, Yu-Chuan; Kan, Kai-Zhi; Yu, Min-Chin; Chien, Ta-Chun; Chen, Yi-Heng; Kuo, Po-Yi; Sze, Simon M. |
| 國立交通大學 |
2018-08-21T05:56:29Z |
High Mobility Tungsten-Doped Thin-Film Transistor on Polyimide Substrate with Low Temperature Process
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Ruan, Dun-Bao; Liu, Po-Tsun; Chiu, Yu-Chuan; Yu, Min-Chin; Gan, Kai-jhih; Chien, Ta-Chun; Kuo, Po-Yi; Sze, Simon M. |
| 國立交通大學 |
2018-08-21T05:54:11Z |
Comprehensive Analysis on Electrical Characteristics of Pi-Gate Poly-Si Junctionless FETs
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Hsieh, Dong-Ru; Lin, Jer-Yi; Kuo, Po-Yi; Chao, Tien-Sheng |
| 國立交通大學 |
2018-08-21T05:53:29Z |
Investigation of Channel Doping Concentration and Reverse Boron Penetration on P-Type Pi-Gate Poly-Si Junctionless Accumulation Mode FETs
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Hsieh, Dong-Ru; Chan, Yi-De; Kuo, Po-Yi; Chao, Tien-Sheng |
| 國立交通大學 |
2018-08-21T05:53:29Z |
Stacked Sidewall-Damascene Double-Layer Poly-Si Trigate FETs With RTA-Improved Crystallinity
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Shen, Chiuan-Huei; Kuo, Po-Yi; Chung, Chun-Chih; Lee, Sen-Yang; Chao, Tien-Sheng |
| 國立交通大學 |
2018-08-21T05:53:27Z |
Effects of Backchannel Passivation on Electrical Behavior of Hetero-Stacked a-IWO/IGZO Thin Film Transistors
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Liu, Po-Tsun; Chang, Chih-Hsiang; Kuo, Po-Yi; Chen, Po-Wen |
| 國立交通大學 |
2018-08-21T05:53:19Z |
Mobility enhancement for high stability tungsten-doped indium-zinc oxide thin film transistors with a channel passivation layer
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Ruan, Dun-Bao; Liu, Po-Tsun; Chiu, Yu-Chuan; Kuo, Po-Yi; Yu, Min-Chin; Gan, Kai-Jhih; Chien, Ta-Chun; Sze, Simon M. |
| 國立交通大學 |
2017-04-21T06:56:35Z |
High-performance sidewall damascened tri-gate poly-si TFTs with the strain proximity free technique and stress memorization technique
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Hsieh, Dong-Ru; Kuo, Po-Yi; Lin, Jer-Yi; Chen, Yi-Hsuan; Chang, Tien-Shun; Chao, Tien-Sheng |
| 國立交通大學 |
2017-04-21T06:56:21Z |
Junctionless Poly-Si Nanowire Transistors With Low-Temperature Trimming Process for Monolithic 3-D IC Application
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Lin, Jer-Yi; Kuo, Po-Yi; Lin, Ko-Li; Chin, Chun-Chieh; Chao, Tien-Sheng |
| 國立交通大學 |
2017-04-21T06:55:58Z |
High-Performance Pi-Gate Poly-Si Junctionless and Inversion Mode FET
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Hsieh, Dong-Ru; Lin, Jer-Yi; Kuo, Po-Yi; Chao, Tien-Sheng |
| 國立交通大學 |
2017-04-21T06:48:46Z |
Fabrication and Characterization of Pi-Gate Poly-Si Junctionless and Inversion Mode Fin-FETs for 3-D IC Applications
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Hsieh, Don-Ru; Lin, Jer-Yi; Kuo, Po-Yi; Chao, Tien-Sheng |
| 國立交通大學 |
2017-04-21T06:48:18Z |
Implantation Free GAA Double Spacer Poly-Si Nanowires Channel Junctionless FETs with Sub-1V Gate Operation and Near Ideal Subthreshold Swing
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Kuo, Po-Yi; Lin, Jer-Yi; Chao, Tien-Sheng |
| 國立交通大學 |
2015-07-21T11:20:46Z |
High-Performance GAA Sidewall-Damascened Sub-10-nm In Situ n(+)-Doped Poly-Si NWs Channels Junctionless FETs
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Kuo, Po-Yi; Lu, Yi-Hsien; Chao, Tien-Sheng |
| 國立交通大學 |
2014-12-16T06:14:01Z |
Manufacturing method of a semiconductor component with a nanowire channel
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Kuo Po-Yi; Chao Tien-Sheng; Lu Yi-Hsien |
| 國立交通大學 |
2014-12-08T15:48:37Z |
Characteristics of SONOS-Type Flash Memory With In Situ Embedded Silicon Nanocrystals
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Chiang, Tsung-Yu; Wu, Yi-Hong; Ma, William Cheng-Yu; Kuo, Po-Yi; Wang, Kuan-Ti; Liao, Chia-Chun; Yeh, Chi-Ruei; Yang, Wen-Luh; Chao, Tien-Sheng |
| 國立交通大學 |
2014-12-08T15:48:00Z |
Novel Symmetric Vertical-Channel Ni-Salicided Poly-Si Thin-Film Transistors With High ON/OFF-Current Ratio
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Wu, Yi-Hong; Kuo, Po-Yi; Lu, Yi-Hsien; Chen, Yi-Hsuan; Chao, Tien-Sheng |
| 國立交通大學 |
2014-12-08T15:38:10Z |
High-Performance Poly-Si TFTs of Top-Gate with High-kappa Metal-Gate Combine the Laser Annealed Channel and Glass Substrate
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Lu, Yi-Hsien; Chien, Chao-Hsin; Kuo, Po-Yi; Yang, Ming-Jui; Lin, Hsiao-Yi; Chao, Tien-Sheng |
| 國立交通大學 |
2014-12-08T15:37:33Z |
Novel Sub-10-nm Gate-All-Around Si Nanowire Channel Poly-Si TFTs With Raised Source/Drain
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Lu, Yi-Hsien; Kuo, Po-Yi; Wu, Yi-Hong; Chen, Yi-Hsuan; Chao, Tien-Sheng |
| 國立交通大學 |
2014-12-08T15:31:57Z |
Low-Temperature Polycrystalline-Silicon Tunneling Thin-Film Transistors With MILC
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Chen, Yi-Hsuan; Yen, Li-Chen; Chang, Tien-Shun; Chiang, Tsung-Yu; Kuo, Po-Yi; Chao, Tien-Sheng |
| 國立交通大學 |
2014-12-08T15:30:52Z |
Symmetric Vertical-Channel Nickel-Salicided Poly-Si Thin-Film Transistors With Self-Aligned Oxide Overetching Structures
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Wu, Yi-Hong; Kuo, Po-Yi; Lu, Yi-Hsien; Chen, Yi-Hsuan; Chiang, Tsung-Yu; Wang, Kuan-Ti; Yen, Li-Chen; Chao, Tien-Sheng |
| 國立交通大學 |
2014-12-08T15:23:48Z |
Reliability Analysis of Symmetric Vertical-Channel Nickel-Salicided Poly-Si Thin-Film Transistors
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Wu, Yi-Hong; Lin, Je-Wei; Lu, Yi-Hsien; Kuo, Rou-Han; Yen, Li-Chen; Chen, Yi-Hsuan; Liao, Chia-Chun; Kuo, Po-Yi; Chao, Tien-Sheng |
| 國立交通大學 |
2014-12-08T15:21:25Z |
High-Performance Poly-Si Thin-Film Transistors With L-Fin Channels
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Lu, Yi-Hsien; Kuo, Po-Yi; Lin, Je-Wei; Wu, Yi-Hong; Chen, Yi-Hsuan; Chao, Tien-Sheng |
| 國立交通大學 |
2014-12-08T15:15:43Z |
The impact of deep Ni salicidation and NH3 plasma treatment on nano-SOI FinFETs
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You, Hsin-Chiang; Kuo, Po-Yi; Ko, Fu-Hsiang; Chao, Tien-Sheng; Lei, Tan-Fu |
| 國立交通大學 |
2014-12-08T15:14:07Z |
Characteristics of self-aligned Si/Ge T-gate poly-Si thin-film transistors with high ON/OFF current ratio
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Kuo, Po-Yi; Chao, Tien-Sheng; Hsieh, Pei-Shan; Lei, Tan-Fu |
| 國立交通大學 |
2014-12-08T15:11:17Z |
SONOS memories with embedded silicon nanocrystals in nitride
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Liu, Mei-Chun; Chiang, Tsung-Yu; Kuo, Po-Yi; Chou, Ming-Hong; Wu, Yi-Hong; You, Hsin-Chiang; Cheng, Ching-Hwa; Liu, Sheng-Hsien; Yang, Wen-Luh; Lei, Tan-Fu; Chao, Tien-Sheng |
显示项目 11-35 / 41 (共2页)
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