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机构 日期 题名 作者
國立交通大學 2019-04-02T06:04:16Z Back-Channel Etched Double Layer In-W-O/In-W-Zn-O Thin-Film Transistors Li, Zhen-Hao; Kuo, Po-Yi; Chen, Wen-Tzu; Liu, Po-Tsun
國立交通大學 2019-04-02T06:04:16Z High Performance Amorphous In-W-Zn-O Thin Film Transistor with Ultra-Thin Active Channel for Low Voltage Operation Liu, Po-Tsun; Kuo, Po-Yi; Hsu, Shan-Ming
國立交通大學 2019-04-02T06:00:27Z The influence on electrical characteristics of amorphous indium tungsten oxide thin film transistors with multi-stacked active layer structure Ruan, Dun-Bao; Liu, Po-Tsun; Gan, Kai-Jhih; Chiu, Yu-Chuan; Yu, Min-Chin; Chien, Ta-Chun; Chen, Yi-Heng; Kuo, Po-Yi; Sze, Simon M.
國立交通大學 2019-04-02T05:59:59Z Performance improvements of tungsten and zinc doped indium oxide thin film transistor by fluorine based double plasma treatment with a high-K gate dielectric Ruan, Dun-Bao; Liu, Po-Tsun; Chiu, Yu-Chuan; Yu, Min-Chin; Gan, Kai-Jhih; Chien, Ta-Chun; Chen, Yi-Heng; Kuo, Po-Yi; Sze, Simon M.
國立交通大學 2019-04-02T05:59:28Z Effect of interfacial layer on device performance of metal oxide thin-film transistor with a multilayer high-k gate stack Ruan, Dun-Bao; Liu, Po-Tsun; Chiu, Yu-Chuan; Kuo, Po-Yi; Yu, Min-Chin; Kan, Kai-Zhi; Chien, Ta-Chun; Chen, Yi-Heng; Sze, Simon M.
國立交通大學 2019-04-02T05:58:50Z Investigation of low operation voltage InZnSnO thin-film transistors with different high-k gate dielectric by physical vapor deposition Ruan, Dun-Bao; Liu, Po-Tsun; Chiu, Yu-Chuan; Kan, Kai-Zhi; Yu, Min-Chin; Chien, Ta-Chun; Chen, Yi-Heng; Kuo, Po-Yi; Sze, Simon M.
國立交通大學 2018-08-21T05:56:29Z High Mobility Tungsten-Doped Thin-Film Transistor on Polyimide Substrate with Low Temperature Process Ruan, Dun-Bao; Liu, Po-Tsun; Chiu, Yu-Chuan; Yu, Min-Chin; Gan, Kai-jhih; Chien, Ta-Chun; Kuo, Po-Yi; Sze, Simon M.
國立交通大學 2018-08-21T05:54:11Z Comprehensive Analysis on Electrical Characteristics of Pi-Gate Poly-Si Junctionless FETs Hsieh, Dong-Ru; Lin, Jer-Yi; Kuo, Po-Yi; Chao, Tien-Sheng
國立交通大學 2018-08-21T05:53:29Z Investigation of Channel Doping Concentration and Reverse Boron Penetration on P-Type Pi-Gate Poly-Si Junctionless Accumulation Mode FETs Hsieh, Dong-Ru; Chan, Yi-De; Kuo, Po-Yi; Chao, Tien-Sheng
國立交通大學 2018-08-21T05:53:29Z Stacked Sidewall-Damascene Double-Layer Poly-Si Trigate FETs With RTA-Improved Crystallinity Shen, Chiuan-Huei; Kuo, Po-Yi; Chung, Chun-Chih; Lee, Sen-Yang; Chao, Tien-Sheng

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