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Institution Date Title Author
國立交通大學 2020-02-01 Effect of Seed Layer on Gate-All-Around Poly-Si Nanowire Negative-Capacitance FETs With MFMIS and MFIS Structures: Planar Capacitors to 3-D FETs Chao, Tien-Sheng; Chen, Hsin-Yu; Huang, Yu-En; Chung, Chun-Chih; Shen, Chiuan-Huei; Kuo, Po-Yi; Lee, Shen-Yang; Chen, Han-Wei
國立交通大學 2020-01-02T00:03:25Z Experimental Demonstration of Performance Enhancement of MFMIS and MFIS for 5-nm x 12.5-nm Poly-Si Nanowire Gate-All-Around Negative Capacitance FETs Featuring Seed-Layer and PMA-Free Process Lee, Shen-Yang; Chen, Han-Wei; Shen, Chiuan-Huei; Kuo, Po-Yi; Chung, Chun-Chih; Huang, Yu-En; Chen, Hsin-Yu; Chao, Tien-Sheng
國立交通大學 2019-12-13T01:12:24Z Experimental Demonstration of Stacked Gate- All-Around Poly-Si Nanowires Negative Capacitance FETs With Internal Gate Featuring Seed Layer and Free of Post-Metal Annealing Process Lee, Shen-Yang; Chen, Han-Wei; Shen, Chiuan-Huei; Kuo, Po-Yi; Chung, Chun-Chih; Huang, Yu-En; Chen, Hsin-Yu; Chao, Tien-Sheng
國立交通大學 2019-08-02T02:18:32Z Two-Dimensional-Like Amorphous Indium Tungsten Oxide Nano-Sheet Junctionless Transistors with Low Operation Voltage Kuo, Po-Yi; Chang, Chien-Min; Liu, I-Han; Liu, Po-Tsun
國立交通大學 2019-06-03T01:09:16Z Low Thermal Budget Amorphous Indium Tungsten Oxide Nano-Sheet Junctionless Transistors with Near Ideal Subthreshold Swing Kuo, Po-Yi; Chang, Chien-Min; Liu, Po-Tsun
國立交通大學 2019-04-02T06:04:16Z Back-Channel Etched Double Layer In-W-O/In-W-Zn-O Thin-Film Transistors Li, Zhen-Hao; Kuo, Po-Yi; Chen, Wen-Tzu; Liu, Po-Tsun
國立交通大學 2019-04-02T06:04:16Z High Performance Amorphous In-W-Zn-O Thin Film Transistor with Ultra-Thin Active Channel for Low Voltage Operation Liu, Po-Tsun; Kuo, Po-Yi; Hsu, Shan-Ming
國立交通大學 2019-04-02T06:00:27Z The influence on electrical characteristics of amorphous indium tungsten oxide thin film transistors with multi-stacked active layer structure Ruan, Dun-Bao; Liu, Po-Tsun; Gan, Kai-Jhih; Chiu, Yu-Chuan; Yu, Min-Chin; Chien, Ta-Chun; Chen, Yi-Heng; Kuo, Po-Yi; Sze, Simon M.
國立交通大學 2019-04-02T05:59:59Z Performance improvements of tungsten and zinc doped indium oxide thin film transistor by fluorine based double plasma treatment with a high-K gate dielectric Ruan, Dun-Bao; Liu, Po-Tsun; Chiu, Yu-Chuan; Yu, Min-Chin; Gan, Kai-Jhih; Chien, Ta-Chun; Chen, Yi-Heng; Kuo, Po-Yi; Sze, Simon M.
國立交通大學 2019-04-02T05:59:28Z Effect of interfacial layer on device performance of metal oxide thin-film transistor with a multilayer high-k gate stack Ruan, Dun-Bao; Liu, Po-Tsun; Chiu, Yu-Chuan; Kuo, Po-Yi; Yu, Min-Chin; Kan, Kai-Zhi; Chien, Ta-Chun; Chen, Yi-Heng; Sze, Simon M.

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