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Institution Date Title Author
臺大學術典藏 1992-02 BiCMOS dynamic Manchester carry look ahead circuit for high speed arithmetic unit VLSI Kuo, J.B.; Liao, H.J.; Chen, H.P.; KuoJB; Kuo, J.B.; Liao, H.J.; Chen, H.P.
臺大學術典藏 1991-09 A BiCMOS tristate buffer for high-speed microprocessor VLSI Kuo, J.B.; Liao, H.J.; Kuo, J.B.; Liao, H.J.; KuoJB
臺大學術典藏 1991-09 Device-level transient analysis of a 1 μm six-transistor BiCMOS inverter circuit using a large-scale quasi-3D device simulator Kuo, J.B.; Chen, Y.W.Kuojb; Kuo, J.B.; Chen, Y.W.; KuoJB
臺大學術典藏 1991-07 BiCMOS edge detector with correlated-double-sampling readout circuit for pattern recognition neural network Kuo, J.B.; Chou, T.L.; Wong, E.J.; Kuo, J.B.; Chou, T.L.; Wong, E.J.; KuoJB
臺大學術典藏 1991-06 A structured adaptive neural network for pattern recognition VLSI Kuo, J.B.; Wong, E.J.; Chen, C.C.; Hsiao, C.C.; Kuo, J.B.; Wong, E.J.; Chen, C.C.; Hsiao, C.C.; KuoJB
臺大學術典藏 1991-05 Device-level analysis of a 1 μm BiCMOS inverter circuit operating at 77 K using a modified PISCES program Kuo, J.B.; Chen, Y.W.; Lou, K.H.; Kuo, J.B.; Chen, Y.W.; Lou, K.H.; KuoJB
臺大學術典藏 1991-05 A coded block adaptive neural network structure for pattern recognition VLSI Kuo, J.B.; Chen, Y.K.; Lu, Y.H.; Mao, W.C.; KuoJB; Kuo, J.B.; Chen, Y.K.; Lu, Y.H.; Mao, W.C

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