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Institution Date Title Author
臺大學術典藏 1993-05 A BiCMOS dynamic divider circuit using a nonrestoring iterative architecture with carry look ahead for CPU VLSI Kuo, J.B.; Chen, H.P.; Huang, H.J.; Kuo, J.B.; Chen, H.P.; Huang, H.J.; KuoJB
臺大學術典藏 1993-05 Accumulation-type vs. inversion-type of an ultra-thin SIO PMOS device operating at 300 K and 77 K: subthreshold behavior and pull-up switching performance of a CMOS inverter Kuo, J.B.; Sim, J.H.; Kuo, J.B.; Sim, J.H.; KuoJB
臺大學術典藏 1992-10 A BiCMOS dynamic full adder circuit for VLSI implementation of high-speed parallel multipliers using Wallace tree reduction architecture Kuo, J.B.; Liao, H.J.; Chen, H.P.; Kuo, J.B.; Liao, H.J.; Chen, H.P.; KuoJB
臺大學術典藏 1992-10 Delayed-turn-on phenomenon in accumulation-type SOI pMOS device operating at liquid nitrogen temperature Kuo, J.B.; Sim, J.H.; Kuo, J.B.; Sim, J.H.; KuoJB
臺大學術典藏 1992-06 A radical-partitioned coded block adaptive neural network structure for large-volume Chinese characters recognition Kuo, J.B.; Mao, M.W.; Kuo, J.B.; Mao, M.W.; KuoJB
臺大學術典藏 1992-02 BiCMOS dynamic Manchester carry look ahead circuit for high speed arithmetic unit VLSI Kuo, J.B.; Liao, H.J.; Chen, H.P.; KuoJB; Kuo, J.B.; Liao, H.J.; Chen, H.P.
臺大學術典藏 1991-09 A BiCMOS tristate buffer for high-speed microprocessor VLSI Kuo, J.B.; Liao, H.J.; Kuo, J.B.; Liao, H.J.; KuoJB
臺大學術典藏 1991-09 Device-level transient analysis of a 1 μm six-transistor BiCMOS inverter circuit using a large-scale quasi-3D device simulator Kuo, J.B.; Chen, Y.W.Kuojb; Kuo, J.B.; Chen, Y.W.; KuoJB
臺大學術典藏 1991-07 BiCMOS edge detector with correlated-double-sampling readout circuit for pattern recognition neural network Kuo, J.B.; Chou, T.L.; Wong, E.J.; Kuo, J.B.; Chou, T.L.; Wong, E.J.; KuoJB
臺大學術典藏 1991-06 A structured adaptive neural network for pattern recognition VLSI Kuo, J.B.; Wong, E.J.; Chen, C.C.; Hsiao, C.C.; Kuo, J.B.; Wong, E.J.; Chen, C.C.; Hsiao, C.C.; KuoJB

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