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"lai bo cheng charles"

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Showing items 11-20 of 32  (4 Page(s) Totally)
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Institution Date Title Author
國立交通大學 2017-04-21T06:49:33Z Computation and Communication Aware Task Graph Scheduling on Multi-GPU Systems Wang, Yun-Ting; Lee, Jia-Ying; Lai, Bo-Cheng Charles
國立交通大學 2017-04-21T06:49:03Z Scalable Mutli-Layer Barrier Synchronization on NoC Tseng, Yu-Lun; Huang, Kun-Hua; Lai, Bo-Cheng Charles
國立交通大學 2017-04-21T06:48:47Z Enhancing Data Reuse in Cache Contention Aware Thread Scheduling on GPGPU Lu, Chin-Fu; Kuo, Hsien-Kai; Lai, Bo-Cheng Charles
國立交通大學 2017-04-21T06:48:29Z BRAM Efficient Multi-ported Memory on FPGA Lin, Jiun-Liang; Lai, Bo-Cheng Charles
國立交通大學 2016-03-28T00:04:19Z Scalable Global Power Management Policy Based on Combinatorial Optimization for Multiprocessors Pan, Gung-Yu; Yang, Jed; Jou, Jing-Yang; Lai, Bo-Cheng Charles
國立交通大學 2015-12-02T03:00:59Z A Locality-Aware Dynamic Thread Scheduler for GPGPUs Huang, Yu-Hao; Tseng, Ying-Yu; Kuo, Hsien-Kai; Yen, Ta-Kan; Lai, Bo-Cheng Charles
國立交通大學 2015-12-02T03:00:55Z A Cache Aware Multithreading Decision Scheme on GPGPUs Yen, Ta-Kang; Yu, Bo-Yao; Lai, Bo-Cheng Charles
國立交通大學 2015-12-02T02:59:38Z A High-Performance Double-Layer Counting Bloom Filter for Multicore Systems Lai, Bo-Cheng Charles; Chen, Kuan-Ting; Wu, Ping-Ru
國立交通大學 2015-12-02T02:59:21Z Power-Efficient Instancy Aware DRAM Scheduling Pan, Gung-Yu; Lai, Chih-Yen; Jou, Jing-Yang; Lai, Bo-Cheng Charles
國立交通大學 2015-07-21T11:21:09Z Reducing Contention in Shared Last-Level Cache for Throughput Processors Kuo, Hsien-Kai; Lai, Bo-Cheng Charles; Jou, Jing-Yang

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