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Showing items 1-5 of 5 (1 Page(s) Totally)
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| 國立交通大學 |
2019-04-02T06:04:21Z |
Interface Discrete Trap Induced Variability for Negative Capacitance FinFETs
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Lee, Ho-Pei; Tseng, Kuei-Yang; Su, Pin |
| 國立交通大學 |
2018-08-21T05:57:00Z |
Suppressed Fin-LER Induced Variability in Negative Capacitance FinFETs
|
Lee, Ho-Pei; Su, Pio |
| 國立交通大學 |
2018-08-21T05:56:52Z |
Investigation and Comparison of Design Space for Ultra-Thin-Body GeOI/SOI Negative Capacitance FETs
|
Lee, Ho-Pei; Yu, Chien-Lin; You, Wei-Xiang; Su, Pin |
| 國立交通大學 |
2018-08-21T05:52:50Z |
Suppressed Fin-LER Induced Variability in Negative Capacitance FinFETs
|
Lee, Ho-Pei; Su, Pin |
| 國立交通大學 |
2018-01-24T07:40:33Z |
鍺通道超薄絕緣層負電容金氧半場效電晶體之設計空間及負電容鰭狀電晶體之鰭邊緣粗糙引發之變異度分析
|
李禾培; 蘇彬; Lee, Ho-Pei; Su, Pin |
Showing items 1-5 of 5 (1 Page(s) Totally)
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