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"lee yu min"
Showing items 51-60 of 105 (11 Page(s) Totally)
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| 國立交通大學 |
2014-12-12T01:22:40Z |
超大型積體電路的熱分析技術
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黃培育; Huang, Pei-Yu; 李育民; Lee, Yu-Min |
| 國立交通大學 |
2014-12-08T15:37:06Z |
A Hierarchical Bin-Based Legalizer for Standard-Cell Designs with Minimal Disturbance
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Lee, Yu-Min; Wu, Tsung-You; Chiang, Po-Yi |
| 國立交通大學 |
2014-12-08T15:33:13Z |
Power Delivery Network Design for Wiring and TSV Resource Minimization in TSV-Based 3-D ICs
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Wei, Shu-Han; Lee, Yu-Min; Ho, Chia-Tung; Sun, Chih-Ting; Cheng, Liang-Chia |
| 國立交通大學 |
2014-12-08T15:31:12Z |
An Efficient Method for Analyzing On-Chip Thermal Reliability Considering Process Variations
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Lee, Yu-Min; Huang, Pei-Yu |
| 國立交通大學 |
2014-12-08T15:28:04Z |
A Robust Incremental Power Grid Analyzer by Macromodeling Approach and Orthogonal Matching Pursuit
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Lee, Yi-Hsuan; Lee, Yu-Min; Cheng, Liang-Chia; Chang, Yen-Tang |
| 國立交通大學 |
2014-12-08T15:24:49Z |
Simultaneous area minimization and decaps insertion for power delivery network using adjoint sensitivity analysis with IEKS method
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Huang, Pei-Yu; Lee, Yu-Min; Tsai, Jeng-Liang; Chen, Charlie Chung-Ping |
| 國立交通大學 |
2014-12-08T15:24:36Z |
Post-Routing Redundant Via Insertion with Wire Spreading Capability
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Lei, Cheok-Kei; Chiang, Po-Yi; Lee, Yu-Min |
| 國立交通大學 |
2014-12-08T15:24:36Z |
A Multiple Supply Voltage Based Power Reduction Method in 3-D ICs Considering Process Variations and Thermal Effects
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Yu, Shih-An; Huang, Pei-Yu; Lee, Yu-Min |
| 國立交通大學 |
2014-12-08T15:24:35Z |
Stochastic Thermal Simulation Considering Spatial Correlated Within-Die Process Variations
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Huang, Pei-Yu; Wu, Jia-Hong; Lee, Yu-Min |
| 國立交通大學 |
2014-12-08T15:24:33Z |
On-Chip Statistical Hot-Spot Estimation Using Mixed-Mesh Statistical Polynomial Expression Generating and Skew-Normal Based Moment Matching Techniques
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Huang, Pei-Yu; Lee, Yu-Min; Pan, Chi-Wen |
Showing items 51-60 of 105 (11 Page(s) Totally)
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