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"lee yu min"
Showing items 56-65 of 105 (11 Page(s) Totally) << < 1 2 3 4 5 6 7 8 9 10 > >> View [10|25|50] records per page
| 國立交通大學 |
2014-12-08T15:24:49Z |
Simultaneous area minimization and decaps insertion for power delivery network using adjoint sensitivity analysis with IEKS method
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Huang, Pei-Yu; Lee, Yu-Min; Tsai, Jeng-Liang; Chen, Charlie Chung-Ping |
| 國立交通大學 |
2014-12-08T15:24:36Z |
Post-Routing Redundant Via Insertion with Wire Spreading Capability
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Lei, Cheok-Kei; Chiang, Po-Yi; Lee, Yu-Min |
| 國立交通大學 |
2014-12-08T15:24:36Z |
A Multiple Supply Voltage Based Power Reduction Method in 3-D ICs Considering Process Variations and Thermal Effects
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Yu, Shih-An; Huang, Pei-Yu; Lee, Yu-Min |
| 國立交通大學 |
2014-12-08T15:24:35Z |
Stochastic Thermal Simulation Considering Spatial Correlated Within-Die Process Variations
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Huang, Pei-Yu; Wu, Jia-Hong; Lee, Yu-Min |
| 國立交通大學 |
2014-12-08T15:24:33Z |
On-Chip Statistical Hot-Spot Estimation Using Mixed-Mesh Statistical Polynomial Expression Generating and Skew-Normal Based Moment Matching Techniques
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Huang, Pei-Yu; Lee, Yu-Min; Pan, Chi-Wen |
| 國立交通大學 |
2014-12-08T15:21:18Z |
Redundant Via Insertion under Timing Constraints
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Pan, Chi-Wen; Lee, Yu-Min |
| 國立交通大學 |
2014-12-08T15:10:13Z |
Hierarchical power delivery network analysis using Markov chains
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Huang, Pei-Yu; Lin, Chih-Kang; Lee, Yu-Min |
| 國立交通大學 |
2014-12-08T15:09:35Z |
Full-Chip Thermal Analysis for the Early Design Stage via Generalized Integral Transforms
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Huang, Pei-Yu; Lee, Yu-Min |
| 國立高雄第一科技大學 |
2012/07/03 |
研究分析企業資源與資訊科技資源對於企業流程委外績效影響
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李宇民; Lee Yu-min |
| 南台科技大學 |
2012 |
技術性貿易障礙協定相關規範及爭端解決之研究-以中國大陸對外簽署自由貿易協定為例
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李育明; Lee, Yu Min |
Showing items 56-65 of 105 (11 Page(s) Totally) << < 1 2 3 4 5 6 7 8 9 10 > >> View [10|25|50] records per page
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