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Institution Date Title Author
國立臺灣大學 2008 Unified Convolutional/Turbo Decoder Design Using Tile-Based Timing Analysis of VA/MAP Kernel Li, Fan-Min; Lin, Cheng-Hung; Wu, An-Yeu
臺大學術典藏 2007-04-19T04:55:08Z A new stopping criterion for efficient early termination in turbo decoder designs Li, F.-M. and Wu, A.-Y.; Li, Fan-Min; Wu, An-Yeu; Li, Fan-Min; Wu, An-Yeu
國立臺灣大學 2007 整合型錯誤更正碼之演算法及積體電路架構設計 李芳明; Li, Fan-Min
國立臺灣大學 2007 On The New Stopping Criteria of Iterative Turbo Decoding by Using Decoding Threshold Li, Fan-Min; Wu, An-Yeu
國立臺灣大學 2006 High-Performance VLSI Architecture of Decision Feedback Equalizer for Gigabit Systems Lin, Chih-Hsiu; Wu, An-Yeu; Li, Fan-Min
國立臺灣大學 2005-12 A new stopping criterion for efficient early termination in turbo decoder designs Li, Fan-Min; Wu, An-Yeu
國立臺灣大學 2004-12 Unified convolutional/turbo decoder architecture design based on triple-mode MAP/VA kernel Li, Fan-Min; Shen, Pei-Ling; Wu, An-Yeu
臺大學術典藏 2004-12 Unified convolutional/turbo decoder architecture design based on triple-mode MAP/VA kernel Li, Fan-Min; Shen, Pei-Ling; Wu, An-Yeu; Li, Fan-Min; Shen, Pei-Ling; Wu, An-Yeu
國立臺灣大學 2004-05 VLSI design of dual-mode Viterbi/turbo decoder for 3GPP Huang, Kai; Li, Fan-Min; Shen, Pei-Ling; Wu, An-Yeu
臺大學術典藏 2004-05 VLSI design of dual-mode Viterbi/turbo decoder for 3GPP Huang, Kai; Li, Fan-Min; Shen, Pei-Ling; Wu, An-Yeu; Huang, Kai; Li, Fan-Min; Shen, Pei-Ling; Wu, An-Yeu
國立臺灣大學 2004 Triple-mode MAP/VA timing analysis for unified convolutional/turbo decoder design Li, Fan-Min; Shen, Pei-Ling; Wu, An-Yeu
臺大學術典藏 2004 Triple-mode MAP/VA timing analysis for unified convolutional/turbo decoder design Li, Fan-Min; Shen, Pei-Ling; Wu, An-Yeu; Li, Fan-Min; Shen, Pei-Ling; Wu, An-Yeu
國立成功大學 2002-08 VLSI architecture and implementation for speech recognizer based on discriminative Bayesian neural network Wang, Jhing-Fa; Wang, Jia-Ching; Suen, An-Nan; Wu, Chung-Hsien; Li, Fan-Min
國立成功大學 2002-06-25 語音轉語音翻譯系統晶片設計 李芳明; Li, Fan-Min

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