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Taiwan Academic Institutional Repository >
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"li yiming"
Showing items 6-15 of 310 (31 Page(s) Totally)
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| 國立交通大學 |
2020-07-01T05:22:05Z |
Numerical Simulation of Thermal Conductivity of SiNW-SiGe0.3 Composite for Thermoelectric Applications
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Lee, Ming-Yi; Li, Yiming; Chuang, Min-Hui; Ohori, Daisuke; Samukawa, Seiji |
| 國立交通大學 |
2020-04-01 |
Effects of a dual spacer on electrical characteristics and random telegraph noise of gate-all-around silicon nanowire p-type metal-oxide-semiconductor field-effect transistors
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Thoti, Narasimhulu; Kola, Sekhar Reddy; Li, Yiming |
| 國立交通大學 |
2020-02-02T23:54:39Z |
Low resistive InGaN film grown by metalorganic chemical vapor deposition
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Shrestha, Niraj Man; Chauhan, Prerna; Wong, Yuen-Yee; Li, Yiming; Samukawa, Seiji; Chang, Edward Yi |
| 國立交通大學 |
2019-10-05T00:08:38Z |
Atomic layer defect-free etching for germanium using HBr neutral beam
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Fujii, Takuya; Ohori, Daisuke; Noda, Shuichi; Tanimoto, Yosuke; Sato, Daisuke; Kurihara, Hideyuki; Mizubayashi, Wataru; Endo, Kazuhiko; Li, Yiming; Lee, Yao-Jen; Ozaki, Takuya; Samukawa, Seiji |
| 國立交通大學 |
2019-08-02T02:18:36Z |
Characteristic Fluctuations of Dynamic Power Delay Induced by Random Nanosized Titanium Nitride Grains and the Aspect Ratio Effect of Gate-All-Around Nanowire CMOS Devices and Circuits
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Li, Yiming; Chen, Chieh-Yang; Chuang, Min-Hui; Chao, Pei-Jung |
| 國立交通大學 |
2019-05-02T00:25:47Z |
Electrical Characteristic of AlGaN/GaN High-Electron-Mobility Transistors With Recess Gate Structure
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Shrestha, Niraj Man; Li, Yiming; Suemitsu, Tetsuya; Samukawa, Seiji |
| 國立交通大學 |
2019-04-03T06:45:06Z |
Tuning of the electron g factor in defect-free GaAs nanodisks
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Yang, Li-Wei; Tsai, Yi-Chia; Li, Yiming; Higo, Aiko; Murayama, Akihiro; Samukawa, S.; Voskoboynikov, O. |
| 國立交通大學 |
2019-04-03T06:44:24Z |
Electrical characteristic fluctuation of 16-nm-gate trapezoidal bulk FinFET devices with fixed top-fin width induced by random discrete dopants
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Huang, Wen-Tsung; Li, Yiming |
| 國立交通大學 |
2019-04-03T06:38:39Z |
Simulation study of 14-nm-gate III-V trigate field effect transistor devices with In1-xGaxAs channel capping layer
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Huang, Cheng-Hao; Li, Yiming |
| 國立交通大學 |
2019-04-02T06:04:33Z |
Circuit-Simulation-Based Multi-objective Evolutionary Algorithm with Multi-Level Clock Driving Technique for a-Si:H TFTs Gate Driver Circuit Design Optimization
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Hung, Sheng-Chin; Chen, Chieh-Yang; Chiang, Chien-Hsueh; Li, Yiming |
Showing items 6-15 of 310 (31 Page(s) Totally)
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