| 國立交通大學 |
2018-08-21T05:52:50Z |
Design and Simulation of Intermediate Band Solar Cell With Ultradense Type-II Multilayer Ge/Si Quantum Dot Superlattice
|
Tsai, Yi-Chia; Lee, Ming-Yi; Li, Yiming; Samukawa, Seiji |
| 國立交通大學 |
2018-01-24T07:40:09Z |
奈米氮化鈦晶粒對全閘極奈米線互補式金氧半場效應電晶體電路功率與延遲特性擾動之研究
|
趙培蓉; 李義明; Chao, Pei-Jung; Li, Yiming |
| 國立交通大學 |
2018-01-24T07:39:37Z |
下世代砷化銦鎵積體電路元件設計與特性模擬之研究
|
黃政皓; 李義明; Huang, Cheng-Hao; Li, Yiming |
| 國立交通大學 |
2018-01-24T07:39:36Z |
多目標演化法暨多準位訊號驅動方式在資通訊和生醫面板顯示器閘級驅動電路設計最佳化之研究
|
洪聖欽; 李義明; Hung, Sheng-Chin; Li, Yiming |
| 國立交通大學 |
2018-01-24T07:38:29Z |
高介電材料金屬閘極塊材鰭式場效應電晶體製程參數分析與電特性建模之研究
|
蘇炳熏; 李義明; Su,Ping-Hsun; Li, Yiming |
| 國立交通大學 |
2017-04-21T06:56:38Z |
Step buffer layer of Al0.25Ga0.75N/Al0.08Ga0.92N on P-InAlN gate normally-off high electron mobility transistors
|
Shrestha, Niraj M.; Li, Yiming; Chang, E. Y. |
| 國立交通大學 |
2017-04-21T06:56:23Z |
Exploration of Inter-Die Bulk Fin-Typed Field Effect Transistor Process Variation for Reduction of Device Variability
|
Su, Ping-Hsun; Li, Yiming |
| 國立交通大學 |
2017-04-21T06:56:23Z |
A Systematic Approach to Correlation Analysis of In-Line Process Parameters for Process Variation Effect on Electrical Characteristic of 16-nm HKMG Bulk FinFET Devices
|
Su, Ping-Hsun; Li, Yiming |
| 國立交通大學 |
2017-04-21T06:56:22Z |
Impact of silicon quantum dot super lattice and quantum well structure as intermediate layer on p-i-n silicon solar cells
|
Rahman, Mohammad Maksudur; Lee, Ming-Yi; Tsai, Yi-Chia; Higo, Akio; Sekhar, Halubai; Igarashi, Makoto; Syazwan, Mohd Erman; Hoshi, Yusuke; Sawano, Kentarou; Usami, Noritaka; Li, Yiming; Samukawa, Seiji |
| 國立交通大學 |
2017-04-21T06:56:14Z |
Simulation Study of Multilayer Si/SiC Quantum Dot Superlattice for Solar Cell Applications
|
Tsai, Yi-Chia; Lee, Ming-Yi; Li, Yiming; Rahman, Mohammad Maksudur; Samukawa, Seiji |
| 國立交通大學 |
2017-04-21T06:56:02Z |
Low Power and High Driving Capability of Amorphous Silicon Gate Driver Circuit
|
Chiang, Chien-Hsueh; Li, Yiming |
| 國立交通大學 |
2017-04-21T06:55:49Z |
Optimal design of the multiple-apertures-GaN-based vertical HEMTs with SiO2 current blocking layer
|
Shrestha, Niraj Man; Li, Yiming; Chang, Edward Yi |
| 國立交通大學 |
2017-04-21T06:55:39Z |
Process-Dependence Analysis for Characteristic Improvement of Ring Oscillator Using 16-nm Bulk FinFET Devices
|
Su, Ping-Hsun; Li, Yiming |
| 國立交通大學 |
2017-04-21T06:55:35Z |
32-nm Multigate Si-nTFET With Microwave-Annealed Abrupt Junction
|
Hou, Fu-Ju; Sung, Po-Jung; Hsueh, Fu-Kuo; Wu, Chien-Ting; Lee, Yao-Jen; Chang, Mao-Nang; Li, Yiming; Hou, Tuo-Hung |
| 國立交通大學 |
2017-04-21T06:55:31Z |
Optimal Geometry Aspect Ratio of Ellipse-Shaped Surrounding-Gate Nanowire Field Effect Transistors
|
Li, Yiming |
| 國立交通大學 |
2017-04-21T06:55:16Z |
Suspended Diamond-Shaped Nanowire With Four {111} Facets for High-Performance Ge Gate-All-Around FETs
|
Hou, Fu-Ju; Sung, Po-Jung; Hsueh, Fu-Kuo; Wu, Chien-Ting; Lee, Yao-Jen; Li, Yiming; Samukawa, Seiji; Hou, Tuo-Hung |
| 國立交通大學 |
2017-04-21T06:55:15Z |
A Novel Driving Method for High-Performance Amorphous Silicon Gate Driver Circuits in Flat Panel Display Industry
|
Chiang, Chien-Hsueh; Li, Yiming |
| 國立交通大學 |
2017-04-21T06:49:59Z |
50% Efficiency Intermediate Band Solar Cell Design Using Highly Periodical Silicon Nanodisk Array
|
Hu, Weiguo; Igarashi, Makoto; Lee, Ming-Yi; Li, Yiming; Samukawa, Seiji |
| 國立交通大學 |
2017-04-21T06:49:47Z |
Experimentally Effective Clean Process to C-V Characteristic Variation Reduction of HKMG MOS Devices
|
Chen, Chien-Hung; Li, Yiming; Chen, Chieh-Yang; Chen, Yu-Yu; Hsu, Sheng-Chia; Huang, Wen-Tsung; Chu, Sheng-Yuan |
| 國立交通大學 |
2017-04-21T06:49:39Z |
3D 65nm CMOS with 320 degrees C Microwave Dopant Activation
|
Lee, Yao-Jen; Lu, Yu-Lun; Hsueh, Fu-Kuo; Huang, Kuo-Chin; Wan, Chia-Chen; Cheng, Tz-Yen; Han, Ming-Hung; Kowalski, Jeff M.; Kowalski, Jeff E.; Heh, Dawei; Chuang, Hsi-Ta; Li, Yiming; Chao, Tien-Sheng; Wu, Ching-Yi; Yang, Fu-Liang |
| 國立交通大學 |
2017-04-21T06:49:39Z |
Electrical characteristic fluctuations in sub-45nm CMOS devices
|
Yang, Fu-Liang; Hwang, Jiunn-Ren; Li, Yiming |
| 國立交通大學 |
2017-04-21T06:49:29Z |
Nanosized-Metal-Grain-Induced Characteristic Fluctuation in Gate-All-Around Si Nanowire Metal-Oxide-Semiconductor Devices
|
Lai, Chun-Ning; Chen, Chien-Yang; Li, Yiming |
| 國立交通大學 |
2017-04-21T06:49:29Z |
Electronic Structure Dependence on the Density, Size and Shape of Ge/Si Quantum Dots Array
|
Lee, Ming-Yi; Tsai, Yi-Chia; Li, Yiming; Samukawat, Seiji |
| 國立交通大學 |
2017-04-21T06:49:27Z |
On Characteristic Fluctuation of Nonideal Bulk FinFET Devices
|
Li, Yiming; Huang, Wen-Tsung |
| 國立交通大學 |
2017-04-21T06:49:26Z |
Prioritization of Key In-Line Process Parameters for Electrical Characteristic Optimization of High-k Metal Gate Bulk FinFET Devices
|
Su, Ping-Husn; Li, Yiming |
| 國立交通大學 |
2017-04-21T06:49:20Z |
Electrical Characteristic and Power Consumption Fluctuations of Trapezoidal Bulk FinFET Devices and Circuits Induced by Random Line Edge Roughness
|
Chen, Chieh-Yang; Huang, Wen-Tsung; Li, Yiming |
| 國立交通大學 |
2017-04-21T06:49:11Z |
Automatic generation of passive equivalent circuits for broadband microstrip antennas
|
Kuo, Yi-Ting; Chao, Hsueh-Yung (Robert); Li, Yiming |
| 國立交通大學 |
2017-04-21T06:49:09Z |
Novel strained CMOS devices with STI stress buffer layers
|
Chen, Hung-Ming; Hwang, Jiunn-Ren; Li, Yiming; Yang, Fu-Liang |
| 國立交通大學 |
2017-04-21T06:48:58Z |
Miniband formulation in Ge/Si quantum dot array
|
Tsai, Yi-Chia; Lee, Ming-Yi; Li, Yiming; Samukawa, Seiji |
| 國立交通大學 |
2017-04-21T06:48:52Z |
Process Technological Analysis for Dynamic Characteristic Improvement of 16-nm HKMG Bulk FinFET CMOS Circuits
|
Su, Ping-Hsun; Li, Yiming |
| 國立交通大學 |
2017-04-21T06:48:52Z |
Statistical Device Simulation of Characteristic Fluctuation of 10-nm Gate-All-Around Silicon Nanowire MOSFETs Induced by Various Discrete Random Dopants
|
Sung, Wen-Li; Chang, Han-Tung; Chen, Chieh-Yang; Chao, Pei-Jung; Li, Yiming |
| 國立交通大學 |
2017-04-21T06:48:52Z |
Miniband Formulation of Bilayer Type II Ge/Si Quantum Dot Superlattices
|
Tsai, Yi-Chia; Lee, Ming-Yi; Li, Yiming; Samukawa, Seiji |
| 國立交通大學 |
2017-04-21T06:48:50Z |
Numerical Simulation of Physical and Electrical Characteristics of Ge/Si Quantum Dots Based Intermediate Band Solar Cell
|
Lee, Ming-Yi; Tsai, Yi-Chia; Li, Yiming; Samukawa, Seiji |
| 國立交通大學 |
2017-04-21T06:48:44Z |
Type-II Ge/Si Quantum Dot superlattice for Intermediate-band Solar Cell Applications
|
Hu, Weiguo; Fauzi, Mohd Erman; Igarashi, Makoto; Higo, Akio; Lee, Ming-Yi; Li, Yiming; Usami, Noritaka; Samukawa, Seiji |
| 國立交通大學 |
2017-04-21T06:48:35Z |
Electrical Characteristic of InGaAs Multiple-Gate MOSFET Devices
|
Huang, Cheng-Hao; Li, Yiming |
| 國立交通大學 |
2017-04-21T06:48:35Z |
Numerical Simulation of Highly Periodical Ge/Si Quantum Dot Array for Intermediate-Band Solar Cell Applications
|
Tsai, Yi-Chia; Lee, Ming-Yi; Li, Yiming; Samukawa, Seiji |
| 國立交通大學 |
2017-04-21T06:48:31Z |
Comprehensive Study on Reflectance of Si3N4 Subwavelength Structures for Silicon Solar Cell Applications Using 3D Finite Element Analysis
|
Lu, Zheng-Liang; Li, Yiming |
| 國立交通大學 |
2017-04-21T06:48:31Z |
Effects of Random Work Function Fluctuations in Nanoszied Metal Grains on Electrical Characteristic of 16 nm High-kappa/Metal Gate Bulk FinFETs
|
Cheng, Hui-Wen; Chiu, Yung-Yueh; Li, Yiming |
| 國立交通大學 |
2017-04-21T06:48:30Z |
Simulation-Based Evolutionary Approach to Electrical Characteristic Optimization of p-i-n Silicon Thin-Film Solar Cells
|
Lu, Zheng-Liang; Li, Yiming; Cheng, Hui-Wen; Lo, I-Hsiu; Wang, Chao-Chu |
| 國立交通大學 |
2017-04-21T06:48:30Z |
Modeling Bias Stress Effect on Threshold Voltage for Amorphous Silicon Thin-Film Transistors and Circuits
|
Shen, Cheng-Han; Lo, I-Hsiu; Li, Yiming |
| 國立交通大學 |
2017-04-21T06:48:22Z |
On Statistical Variation of MOSFETs Induced by Random-Discrete-Dopants and Random-Interface-Traps
|
Li, Yiming; Su, Hsin-Wen; Chen, Chieh-Yang; Cheng, Hui-Wen; Chen, Yu-Yu; Chang, Han-Tung |
| 國立交通大學 |
2017-04-21T06:48:21Z |
Random Work Function Induced DC Characteristic Fluctuation in 16-nm High-kappa/Metal Gate Bulk and SOI FinFETs
|
Su, Hsin-Wen; Chen, Yu-Yu; Chen, Chieh-Yang; Cheng, Hui-Wen; Chang, Han-Tung; Li, Yiming |
| 國立交通大學 |
2017-04-21T06:48:19Z |
Diamond-shaped Ge and Ge0.9Si0.1 Gate-All-Around Nanowire FETs with Four {111} Facets by Dry Etch Technology
|
Lee, Yao-Jen; Hou, Fu-Ju; Chuang, Shang-Shiun; Hsueh, Fu-Kuo; Kao, Kuo-Hsing; Sung, Po-Jung; Yuan, Wei-You; Yao, Jay-Yi; Lu, Yu-Chi; Lin, Kun-Lin; Wu, Chien-Ting; Chen, Hisu-Chih; Chen, Bo-Yuan; Huang, Guo-Wei; Chen, Henry J. H.; Li, Jiun-Yun; Li, Yiming; Samukawa, Seiji; Chao, Tien-Sheng; Tseng, Tseung-Yuen; Wu, Wen-Fa; Hou, Tuo-Hung; Yeh, Wen-Kuan |
| 國立交通大學 |
2017-04-21T06:48:19Z |
High Performance Poly Si Junctionless Transistors with Sub-5nm Conformally Doped Layers by Molecular Monolayer Doping and Microwave Incorporating CO2 Laser Annealing for 3D Stacked ICs Applications
|
Lee, Yao-Jen; Cho, Ta-Chun; Sung, Po-Jung; Kao, Kuo-Hsing; Hsueh, Fu-Kuo; Hou, Fu-Ju; Chen, Po-Cheng; Chen, Hsiu-Chih; Wu, Chien-Ting; Hsu, Shu-Han; Chen, Yi-Ju; Huang, Yao-Ming; Hou, Yun-Fang; Huang, Wen-Hsien; Yang, Chih-Chao; Chen, Bo-Yuan; Lin, Kun-Lin; Chen, Min-Cheng; Shen, Chang-Hong; Huang, Guo-Wei; Huang, Kun-Ping; Current, Michael I.; Li, Yiming; Samukawa, Seiji; Wu, Wen-Fa; Shieh, Jia-Min; Chao, Tien-Sheng; Yeh, Wen-Kuan |
| 國立交通大學 |
2017-04-21T06:48:19Z |
Process Variation Effect, Metal-Gate Work-Function Fluctuation and Random Dopant Fluctuation of 10-nm Gate-All-Around Silicon Nanowire MOSFET Devices
|
Li, Yiming; Chang, Han-Tung; Lai, Chun-Ning; Chao, Pei-Jung; Chen, Chieh-Yang |
| 國立交通大學 |
2016-03-28T00:05:42Z |
The Impact of Fin/Sidewall/Gate Line Edge Roughness on Trapezoidal Bulk FinFET Devices
|
Huang, Wen-Tsung; Li, Yiming |
| 國立交通大學 |
2016-03-28T00:05:42Z |
Impact of Geometry Aspect Ratio on 10-nm Gate-All-Around Silicon-Germanium Nanowire Field Effect Transistors
|
Chao, Pei-Jung; Li, Yiming |
| 國立交通大學 |
2015-12-02T02:59:38Z |
Miniband Calculation of 3-D Nanostructure Array for Solar Cell Applications
|
Lee, Ming-Yi; Li, Yiming; Samukawa, Seiji |
| 國立交通大學 |
2015-12-02T02:59:16Z |
Circuit-Simulation-Based Multi-Objective Evolutionary Algorithm for Design Optimization of a-Si:H TFTs Gate Driver Circuits Under Multilevel Clock Driving
|
Hung, Sheng-Chin; Chiang, Chien-Hsueh; Li, Yiming |
| 國立交通大學 |
2015-12-02T02:59:16Z |
Design, Fabrication and Characterization of Low-Noise and High-Reliability Amorphous Silicon Gate Driver Circuit for Advanced FPD Applications
|
Chiang, Chien-Hsueh; Li, Yiming |
