| 臺大學術典藏 |
2018-09-10T03:43:46Z |
A hybrid morphology processing units architecture for real-time video segmentation systems
|
Chien, S.-Y.; Huang, Y.-W.; Ma, S.-Y.; Chen, L.-G.; LIANG-GEE CHEN |
| 臺大學術典藏 |
2018-09-10T03:43:46Z |
A Cost-Effective Design for MPEG-2 Audio Decoder with Embedded RISC Core
|
LIANG-GEE CHEN; Chen, L.-G.; Wu, R.-J.; Tsai, T.-H. |
| 臺大學術典藏 |
2018-09-10T03:43:46Z |
Predictive parallel motion estimation algorithm for digital image processing
|
Chen, Liang-Gee;Chen, Wai-Ting;Jehng, Yen-Shen;Chiueh, Tzi-Dar; Chen, Liang-Gee; Chen, Wai-Ting; Jehng, Yen-Shen; Chiueh, Tzi-Dar; LIANG-GEE CHEN |
| 臺大學術典藏 |
2018-09-10T03:43:46Z |
A partial-result-reuse architecture and its design technique for morphological operations
|
Ma, S.-Y.; Chen, L.-G.; LIANG-GEE CHEN; Chien, S.-Y. |
| 臺大學術典藏 |
2018-09-10T03:43:45Z |
An efficient linear-phase FIR filter architecture design for wireless embedded system
|
Lin, S.F.; Huang, S.-C.; Yang, F.-S.; Ku, C.-W.; Chen, L.-G.; LIANG-GEE CHEN |
| 臺大學術典藏 |
2018-09-10T03:43:45Z |
An efficient architecture for two-dimensional discrete wavelet transform
|
Wu, P.-C.; Chen, L.-G.; LIANG-GEE CHEN |
| 臺大學術典藏 |
2018-09-10T03:43:45Z |
A real-time practical video segmentation algirithm for MPEG-4 camera systems
|
Ma, S.-Y.; Chen, L.-G.; LIANG-GEE CHEN; Chien, S.-Y.; Huang, Y.-W. |
| 臺大學術典藏 |
2018-09-10T03:43:45Z |
A programmable parallel VLSI architecture for 2-D discrete wavelet transform
|
Chen, C.-Y.; Yang, Z.-L.; Wang, T.-C.; Chen, L.-G.; LIANG-GEE CHEN |
| 臺大學術典藏 |
2018-09-10T03:43:45Z |
An efficient architecture of binary motion estimation for MPEG-4 shape coding
|
Wang, Y.-C.; Chang, H.-C.; Chao, W.-M.; Chen, L.-G.; LIANG-GEE CHEN |
| 臺大學術典藏 |
2018-09-10T03:43:44Z |
CDSP: An application-specific digital signal processor for third generation wireless communications
|
Tseng, P.-C.; Chen, C.-K.; Chen, L.-G.; LIANG-GEE CHEN |
| 臺大學術典藏 |
2018-09-10T03:43:44Z |
Automatic video segmentation for MPEG-4 using predictive watershed
|
Chien, S.-Y.; Huang, Y.-W.; Ma, S.-Y.; Chen, L.-G.; LIANG-GEE CHEN; SHAO-YI CHIEN |
| 臺大學術典藏 |
2018-09-10T03:43:44Z |
Analysis and architecture design of lifting based DWT and EBCOT for JPEG 2000
|
Lian, C.-J.; Chen, K.-F.; Chen, H.-H.; Chen, L.-G.; LIANG-GEE CHEN |
| 臺大學術典藏 |
2018-09-10T03:43:44Z |
Analysis and architecture design of JPEG2000
|
Chen, L.-G.; Lian, C.-J.; Chen, K.-F.; Chen, H.-H.; LIANG-GEE CHEN |
| 臺大學術典藏 |
2018-09-10T03:43:44Z |
Analysis and architecture design of EBCOT for JPEG-2000
|
Chen, K.-F.; Lian, C.-J.; Chen, H.-H.; Chen, L.-G.; LIANG-GEE CHEN |
| 臺大學術典藏 |
2018-09-10T03:43:44Z |
An efficient test bitstream design methodology for fast visual hardware simulation
|
Lin, S.-F.; Ji, W.-S.; Chen, L.-G.; LIANG-GEE CHEN |
| 臺大學術典藏 |
2018-09-10T03:43:43Z |
Hardware-efficient architecture design of tree-depth scanning and multiple quantization scheme for MPEG-4 still texture coding
|
Chang, Hao-Chieh; Yang, Zhong-Lan; Lian, Chung-Jr; Chen, Liang-Gee; LIANG-GEE CHEN |
| 臺大學術典藏 |
2018-09-10T03:43:43Z |
Design and implementation of a bitstream parsing coprocessor for MPEG-4 video system-on-chip solution
|
Chang, Y.-C.; Chang, H.-C.; Chen, L.-G.; LIANG-GEE CHEN |
| 臺大學術典藏 |
2018-09-10T03:43:43Z |
H.26L intra mode encoder architecture for digital camera application
|
Wang, T.-C.; Tseng, P.-C.; Chen, L.-G.; LIANG-GEE CHEN |
| 臺大學術典藏 |
2018-09-10T03:43:42Z |
Robust error concealment algorithm for MPEG-4 with the aids of fuzzy theory
|
Lee, P.-J.; Chen, L.-G.; Wang, W.-J.; Chen, M.-J.; LIANG-GEE CHEN |
| 臺大學術典藏 |
2018-09-10T03:43:41Z |
Scalable module-based architecture for MPEG-4 BMA motion estimation
|
Hsu, M.-Y.; Chang, H.-C.; Wang, Y.-C.; Chen, L.-G.; LIANG-GEE CHEN |
| 臺大學術典藏 |
2018-09-10T03:25:56Z |
Embedded JPEG encoder IP core and memory efficient preprocessing architecture for scanner
|
Lian, C.-J.; Chen, L.-G.; Chang, H.-C.; Chang, Y.-C.; LIANG-GEE CHEN |
| 臺大學術典藏 |
2018-09-10T03:25:56Z |
A novel architecture of inverse quantization and multichannel processing for mpeg-2 audio decoding
|
LIANG-GEE CHEN; Chen, L.-G.; Tsai, T.-H. |
| 臺大學術典藏 |
2018-09-10T03:25:56Z |
A Low Power 8 × 8 Direct 2-D DCT Chip Design
|
LIANG-GEE CHEN; Chen, L.-G.; Chen, L.-L.; Jiu, J.-Y.; Chang, H.-C. |
| 臺大學術典藏 |
2018-09-10T03:25:55Z |
System design consideration for digital wheelchair controller
|
Chen, R.-X.; Chen, L.-G.; Chen, L.; LIANG-GEE CHEN |
| 臺大學術典藏 |
2018-09-10T03:25:55Z |
Programmable VLSI architecture for 2-D discrete wavelet transform
|
Chen, Liang-Gee; LIANG-GEE CHEN; Chen, Chien-Yu; Yang, Zhong-Lan; Wang, Tu-Chih |
