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"liang gee chen"的相關文件
顯示項目 136-160 / 482 (共20頁)
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| 臺大學術典藏 |
2018-09-10T08:07:58Z |
Pyramid architecture for 3840 X 2160 quad full high definition 30 frames/s video acquisition
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Chao, W.-M.;Chen, L.-G.; Chao, W.-M.; Chen, L.-G.; LIANG-GEE CHEN |
| 臺大學術典藏 |
2018-09-10T08:07:58Z |
Low bandwidth decoder framework for H.264/AVC scalable extension
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Chuang, T.-D.;Tsung, P.-K.;Lin, P.-C.;Chang, L.-M.;Ma, T.-C.;Chen, Y.-H.;Chen, L.-G.; Chuang, T.-D.; Tsung, P.-K.; Lin, P.-C.; Chang, L.-M.; Ma, T.-C.; Chen, Y.-H.; Chen, L.-G.; LIANG-GEE CHEN |
| 臺大學術典藏 |
2018-09-10T08:07:58Z |
Localized detection of abandoned luggage
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Chang, J.-Y.;Liao, H.-H.;Chen, L.-G.; Chang, J.-Y.; Liao, H.-H.; Chen, L.-G.; LIANG-GEE CHEN |
| 臺大學術典藏 |
2018-09-10T08:07:58Z |
Learning-based vehicle detection using up-scaling schemes and predictive frame pipeline structures
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Tsai, Y.-M.;Huang, K.-Y.;Tsai, C.-C.;Chen, L.-G.; Tsai, Y.-M.; Huang, K.-Y.; Tsai, C.-C.; Chen, L.-G.; LIANG-GEE CHEN |
| 臺大學術典藏 |
2018-09-10T08:07:58Z |
Low-cost hardware architecture design for 3D warping engine in multiview video applications
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Lin, P.-C.;Tsung, P.-K.;Chen, L.-G.; Lin, P.-C.; Tsung, P.-K.; Chen, L.-G.; LIANG-GEE CHEN |
| 臺大學術典藏 |
2018-09-10T08:07:57Z |
Video stabilization for vehicular applications using surf-like descriptor and KD-tree
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Huang, K.-Y.;Tsai, Y.-M.;Tsai, C.-C.;Chen, L.-G.; Huang, K.-Y.; Tsai, Y.-M.; Tsai, C.-C.; Chen, L.-G.; LIANG-GEE CHEN |
| 臺大學術典藏 |
2018-09-10T08:07:57Z |
Video 2-D-to-3-D conversion based on hybrid depth cueing
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Cheng, C.-C.;Li, C.-T.;Chen, L.-G.; Cheng, C.-C.; Li, C.-T.; Chen, L.-G.; LIANG-GEE CHEN |
| 臺大學術典藏 |
2018-09-10T07:36:53Z |
A 212MPixels/s 4096×2160p multiview video encoder chip for 3D/Quad HDTV applications
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Chen, W.-Y.; Tsung, P.-K.; Chuang, T.-D.; Chiu, H.-K.; Chen, Y.-H.; Hsiao, P.-H.; Chien, S.Y.; Chen, T.-C.; Lin, P.-C.; Chang, C.-Y.; Chen, L.-G.; Ding, L.F.; Ding, Li-Fu; LIANG-GEE CHEN; SHAO-YI CHIEN et al. |
| 臺大學術典藏 |
2018-09-10T07:36:52Z |
Cache-based integer motion/disparity estimation for quad-HD H.264/AVC and HD multiview video coding
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Tsung, P.-K.;Chen, W.-Y.;Ding, L.-F.;Chien, S.-Y.;Chen, L.-G.; Tsung, P.-K.; Chen, W.-Y.; Ding, L.-F.; Chien, S.-Y.; Chen, L.-G.; LIANG-GEE CHEN; SHAO-YI CHIEN |
| 臺大學術典藏 |
2018-09-10T07:36:49Z |
Tera-scale performance machine learning SoC with dual stream processor architecture for multimedia content analysis
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SHAO-YI CHIEN; LIANG-GEE CHEN; Chen, L.-G.; Chien, S.-Y.; Tsai, C.-H.; Tsai, S.-F.; Tang, C.-S.; Chen, T.-W.; Chen, T.-W.;Tang, C.-S.;Tsai, S.-F.;Tsai, C.-H.;Chien, S.-Y.;Chen, L.-G. |
| 臺大學術典藏 |
2018-09-10T07:36:49Z |
Tera-scale performance image stream processor with SoC architecture for multimedia content analysis
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Chen, T.-W.;Tang, C.-S.;Tsai, S.-F.;Tsai, C.-H.;Chien, S.-Y.;Chen, L.-G.; Chen, T.-W.; Tang, C.-S.; Tsai, S.-F.; Tsai, C.-H.; Chien, S.-Y.; Chen, L.-G.; LIANG-GEE CHEN; SHAO-YI CHIEN |
| 臺大學術典藏 |
2018-09-10T07:26:45Z |
Cost-effective design for MPEG2 audio decoder with embedded RISC core
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Tsai, Tsung-Han; Chen, Liang-Gee; Wu, Ren-Jr; LIANG-GEE CHEN |
| 臺大學術典藏 |
2018-09-10T07:26:45Z |
Cost effective architecture design of inverse quantization and multichannel processing for MPEG-2 audio decoding
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Tsai, Tsung-Han; Chen, Liang-Gee; LIANG-GEE CHEN |
| 臺大學術典藏 |
2018-09-10T07:26:45Z |
A LOG-EXP still image compression chip design
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Huang, S.-C.; Chen, L.-G.; LIANG-GEE CHEN |
| 臺大學術典藏 |
2018-09-10T07:26:45Z |
Computation with simultaneously concurrent error detection using bi-directional operands
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Chen, L.G.;Chen, T.H.; Chen, L.G.; Chen, T.H.; LIANG-GEE CHEN |
| 臺大學術典藏 |
2018-09-10T07:26:44Z |
LOG-EXP still image compression chip design
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Huang, Sheng-Chieh; Chen, Liang-Gee; LIANG-GEE CHEN |
| 臺大學術典藏 |
2018-09-10T07:26:44Z |
Single chip CMOS APS camera with direct frame difference output
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Ma, Shyh-Yih; Chen, Liang-Gee; LIANG-GEE CHEN |
| 臺大學術典藏 |
2018-09-10T07:26:44Z |
Novel image compression algorithm by using LOG-EXP transform
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Huang, Sheng-Chieh; Chen, Liang-Gee; Chang, Hao-Chieh; LIANG-GEE CHEN |
| 臺大學術典藏 |
2018-09-10T07:26:44Z |
Low power strategy about correlator array for CDMA baseband processor
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Ku, Chung-Wei; Kuo, Fu-Yen; Chen, Chi-Kuang; Chen, Liang-Gee; LIANG-GEE CHEN |
| 臺大學術典藏 |
2018-09-10T07:26:44Z |
Low power full-search block-matching motion estimation chip for H.263+
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Shen, Jun-Fu; Chen, Liang-Gee; Chang, Hao-Chieh; Wang, Tu-Chih; LIANG-GEE CHEN |
| 臺大學術典藏 |
2018-09-10T07:26:44Z |
Efficient architecture for two-dimensional discrete wavelet transform
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Wu, Po-Cheng; Chen, Liang-Gee; LIANG-GEE CHEN |
| 臺大學術典藏 |
2018-09-10T07:26:43Z |
VLSI architecture design of VLC encoder for high data rate video/image coding
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Chang, Hao-Chieh; Chen, Liang-Gee; Chang, Yung-Chi; Huang, Sheng-Chieh; LIANG-GEE CHEN |
| 臺大學術典藏 |
2018-09-10T07:26:43Z |
System level integration methodology for MPEG-2 audio decoder with embedded RISC core
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Tsai, Tsung-Han; Chen, Liang-Gee; Wu, Ren-Jr.; LIANG-GEE CHEN |
| 臺大學術典藏 |
2018-09-10T07:26:43Z |
Single-chip CMOS APS camera with direct frame difference output
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Ma, S.-Y.; Chen, L.-G.; LIANG-GEE CHEN |
| 臺大學術典藏 |
2018-09-10T07:26:42Z |
Fast belief propagation process element for high-quality stereo estimation
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Cheng, C.-C.;Liang, C.-K.;Lai, Y.-C.;Chen, H.H.;Chen, L.-G.; Cheng, C.-C.; Liang, C.-K.; Lai, Y.-C.; Chen, H.H.; Chen, L.-G.; LIANG-GEE CHEN |
顯示項目 136-160 / 482 (共20頁)
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