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"liang gee chen"的相關文件
顯示項目 281-305 / 482 (共20頁)
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| 臺大學術典藏 |
2018-09-10T05:50:29Z |
Low power and power aware fractional motion estimation of H.264/AVC for mobile applications
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Chen, T.-C.; Chen, Y.-H.; Tsai, C.-Y.; Chen, L.-G.; LIANG-GEE CHEN |
| 臺大學術典藏 |
2018-09-10T05:50:28Z |
Power-scalable algorithm and reconfigurable macro-block pipelining architecture of H.264 Encoder for mobile application
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LIANG-GEE CHEN; Chen, Y.-H.; Chen, T.-C.; Chen, L.-G. |
| 臺大學術典藏 |
2018-09-10T05:50:27Z |
System analysis of VLSI architecture for 5/3 and 1/3 motion-compensated temporal filtering
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Chen, C.-Y.; Huang, C.-T.; Chen, Y.-H.; Chien, S.-Y.; Chen, L.-G.; LIANG-GEE CHEN; SHAO-YI CHIEN |
| 臺大學術典藏 |
2018-09-10T05:50:27Z |
Survey on block matching motion estimation algorithms and architectures with new results
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Huang, Y.-W.; Chen, C.-Y.; Tsai, C.-H.; Shen, C.-F.; Chen, L.-G.; LIANG-GEE CHEN |
| 臺大學術典藏 |
2018-09-10T05:50:27Z |
Scalable rate-distortion-computation hardware accelerator for MCTF and ME
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Chen, Y.-H.; Chen, C.-Y.; Cheng, C.-C.; Chen, L.-G.; LIANG-GEE CHEN |
| 臺大學術典藏 |
2018-09-10T05:50:27Z |
Relative depth layer extraction for monoscopic video by use of multidimensional filter
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Chang, J.-Y.; Cheng, C.-C.; Chien, S.-Y.; Chen, L.-G.; LIANG-GEE CHEN; SHAO-YI CHIEN |
| 臺大學術典藏 |
2018-09-10T05:23:27Z |
Stereo video coding system with hybrid coding based on joint prediction scheme
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Ding, L.-F.; Chien, S.-Y.; Huang, Y.-W.; Chang, Y.-L.; Chen, L.-G.; LIANG-GEE CHEN; Chien, Shao-Yi |
| 臺大學術典藏 |
2018-09-10T05:23:27Z |
Algorithm and architecture of prediction core in stereo video hybrid coding system
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Ding, L.-F.; Chien, S.-Y.; Chen, L.-G.; LIANG-GEE CHEN; Chien, Shao-Yi |
| 臺大學術典藏 |
2018-09-10T05:20:41Z |
Reconfigurable platform for content science research
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Shih, C.-S.; Yang, C.-L.; Ku, M.-K.; Kuo, T.-W.; Chien, S.-Y.; Chang, Y.-W.; Chen, L.-G.; LIANG-GEE CHEN; Shih, Chi-Sheng; Yang, Chia-Lin; TEI-WEI KUO; YAO-WEN CHANG; SHAO-YI CHIEN |
| 臺大學術典藏 |
2018-09-10T05:15:52Z |
A New Block-Matching Criterion for Motion Estimation and its Implementation
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Lee, Y.-P.; LIANG-GEE CHEN; Chen, M.-J.; Chen, L.-G.; Chiueh, T.-D. |
| 臺大學術典藏 |
2018-09-10T05:15:52Z |
NEW COMPARISON ALGORITHM FOR VERIFYING LOGIC INTERCONNECTION OF VLSI.
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Chen, L.G.;Lee, J.Y.;Chen, K.T.;Wang, J.F.; Chen, L.G.; Lee, J.Y.; Chen, K.T.; Wang, J.F.; LIANG-GEE CHEN |
| 臺大學術典藏 |
2018-09-10T05:15:51Z |
Very low bit rate video coding system based on optical flow and region segmentation algorithms
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Ku, Chung-Wei;Chen, Liang-Gee;Chiu, You-Ming; Ku, Chung-Wei; Chen, Liang-Gee; Chiu, You-Ming; LIANG-GEE CHEN |
| 臺大學術典藏 |
2018-09-10T05:15:51Z |
Pipeline interleaving design for FIR, IIR, and FFT array processors
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Chen, L.-G.;Jehng, Y.-S.;Chiueh, T.-D.; Chen, L.-G.; Jehng, Y.-S.; Chiueh, T.-D.; LIANG-GEE CHEN |
| 臺大學術典藏 |
2018-09-10T05:15:51Z |
Hardware-oriented design for weighted median filters
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Chen, Chun-Te;Chen, Liang-Gee;Hsiao, Jue-Hsuan; Chen, Chun-Te; Chen, Liang-Gee; Hsiao, Jue-Hsuan; LIANG-GEE CHEN |
| 臺大學術典藏 |
2018-09-10T05:15:51Z |
Design and VLSI implementation of MPEG audio decoder
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Tsai, Tsung-Han;Chen, Thou-Ho;Chen, Liang-Gee; Tsai, Tsung-Han; Chen, Thou-Ho; Chen, Liang-Gee; LIANG-GEE CHEN |
| 臺大學術典藏 |
2018-09-10T05:15:51Z |
Architecture design of MPEG-2 decoder system
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Lee, Yung-Pin;Chen, Liang-Gee;Ku, Chung-Wei; Lee, Yung-Pin; Chen, Liang-Gee; Ku, Chung-Wei; LIANG-GEE CHEN |
| 臺大學術典藏 |
2018-09-10T05:15:51Z |
An MPEG audio decoder chip
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Tsai, T.-H.;Chen, L.-G.;Chen, T.-H.; Tsai, T.-H.; Chen, L.-G.; Chen, T.-H.; LIANG-GEE CHEN |
| 臺大學術典藏 |
2018-09-10T05:15:50Z |
VLSI architecture for radix-2k Viterbi decoding with transpose algorithm
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Lee, Wen-Ta;Chen, Thou-Ho;Chen, Liang-Gee; Lee, Wen-Ta; Chen, Thou-Ho; Chen, Liang-Gee; LIANG-GEE CHEN |
| 臺大學術典藏 |
2018-09-10T05:15:50Z |
An efficient embedded bitstream parsing processor for MPEG-4 video decoding system
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Chang, Y.-C.; Huang, C.-C.; Chao, W.-M.; Chen, L.-G.; LIANG-GEE CHEN |
| 臺大學術典藏 |
2018-09-10T05:15:50Z |
Algorithm and architecture optimization for full-mode encoding of H.264/AVC intra prediction
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Tsai, C.-H.; Huang, Y.-W.; Chen, L.-G.; LIANG-GEE CHEN |
| 臺大學術典藏 |
2018-09-10T05:15:50Z |
Advances in hardware architectures for image and video coding - A survey
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Tseng, P.-C.; Chang, Y.-C.; Huang, Y.-W.; Fang, H.-C.; Huang, C.-T.; Chen, L.-G.; LIANG-GEE CHEN |
| 臺大學術典藏 |
2018-09-10T05:15:50Z |
VLSI-based array dividers with concurrent error detection
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Chen, T.-H.; Lee, Y.-P.; Chen, L.-G.; LIANG-GEE CHEN |
| 臺大學術典藏 |
2018-09-10T05:15:49Z |
Architecture of global motion compensation for MPEG-4 advanced simple profile
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Chen, Y.-H.; Chen, C.-Y.; Chen, L.-G.; LIANG-GEE CHEN |
| 臺大學術典藏 |
2018-09-10T05:15:49Z |
Architecture design of H.264/AVC decoder with hybrid task pipelining for high definition videos
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Chen, T.-W.; Huang, Y.-W.; Chen, T.-C.; Chen, Y.-H.; Tsai, C.-Y.; Chen, L.-G.; LIANG-GEE CHEN |
| 臺大學術典藏 |
2018-09-10T05:15:49Z |
Analysis, fast algorithm, and VLSI architecture design for H.264/AVC intra frame coder
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Huang, Y.-W.; Hsieh, B.-Y.; Chen, T.-C.; Chen, L.-G.; LIANG-GEE CHEN |
顯示項目 281-305 / 482 (共20頁)
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