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Taiwan Academic Institutional Repository >
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"liang gee chen"
Showing items 241-250 of 482 (49 Page(s) Totally)
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| 臺大學術典藏 |
2018-09-10T05:50:37Z |
Arbitrarily shaped transform of segmented motion field for a pseudo object-oriented very low bit-rate video coding system
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Ku, Chung-Wei;Chiu, You-Ming;Chen, Liang-Gee;Lee, Yung-Pin; Ku, Chung-Wei; Chiu, You-Ming; Chen, Liang-Gee; Lee, Yung-Pin; LIANG-GEE CHEN |
| 臺大學術典藏 |
2018-09-10T05:50:37Z |
A novel video signal processor with programmable data arrangement and efficient memory configuration
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LIANG-GEE CHEN; Wu, P.-C.; Lai, Y.-K.;Chen, L.-G.;Chen, H.-T.;Chen, M.-J.;Lee, Y.-P.;Wu, P.-C.; Lai, Y.-K.; Chen, L.-G.; Chen, H.-T.; Chen, M.-J.; Lee, Y.-P. |
| 臺大學術典藏 |
2018-09-10T05:50:37Z |
A multimedia video conference system: Using region base hybrid coding
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Chen, H.-T.;Wu, P.-C.;Lai, Y.-K.;Chen, L.-G.; Chen, H.-T.; Wu, P.-C.; Lai, Y.-K.; Chen, L.-G.; LIANG-GEE CHEN |
| 臺大學術典藏 |
2018-09-10T05:50:37Z |
A 32-bit logarithmic number system processor
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Huang, S.-C.;Chen, L.-G.;Chen, T.-H.; Huang, S.-C.; Chen, L.-G.; Chen, T.-H.; LIANG-GEE CHEN |
| 臺大學術典藏 |
2018-09-10T05:50:37Z |
HIERARCHICAL FILTER FOR CIRCUIT LAYOUT.
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Chen, L.G.;Wang, J.F.;Lee, J.Y.;Lee, H.T.; Chen, L.G.; Wang, J.F.; Lee, J.Y.; Lee, H.T.; LIANG-GEE CHEN |
| 臺大學術典藏 |
2018-09-10T05:50:37Z |
Fast execution for circuit consistency verification
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Chen, L.G.;Lee, J.Y.;Wang, J.F.;Chen, K.T.; Chen, L.G.; Lee, J.Y.; Wang, J.F.; Chen, K.T.; LIANG-GEE CHEN |
| 臺大學術典藏 |
2018-09-10T05:50:36Z |
Ic design of an adaptive viterbi decoder
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Chan, M.-H.;Lee, W.-T.;Lin, M.-C.;Chen, L.-G.; Chan, M.-H.; Lee, W.-T.; Lin, M.-C.; Chen, L.-G.; LIANG-GEE CHEN |
| 臺大學術典藏 |
2018-09-10T05:50:36Z |
Efficient visual pattern block truncation coding
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Chen, Liang-Gee;Liu, Yuan-Chen; Chen, Liang-Gee; Liu, Yuan-Chen; LIANG-GEE CHEN |
| 臺大學術典藏 |
2018-09-10T05:50:36Z |
Efficient hybrid tree/linear array architectures for block-matching motion estimation algorithms
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Chen, M.-J.;Chen, L.-G.;Cheng, K.-N.;Chen, M.C.; Chen, M.-J.; Chen, L.-G.; Cheng, K.-N.; Chen, M.C.; LIANG-GEE CHEN |
| 臺大學術典藏 |
2018-09-10T05:50:35Z |
Novel video signal processor with reconfigurable pipelined architecture
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Lai, Yeong-Kang;Chen, Liang-Gee;Chiang, Ming-Cheng; Lai, Yeong-Kang; Chen, Liang-Gee; Chiang, Ming-Cheng; LIANG-GEE CHEN |
Showing items 241-250 of 482 (49 Page(s) Totally)
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