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Showing items 1-5 of 5 (1 Page(s) Totally)
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| 國立交通大學 |
2014-12-08T15:39:18Z |
0.13-mu m low-kappa-Cu CMOS logic-based technology for 2.1-Gb high data rate read-channel
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Guo, JC; Lien, WY; Tsai, TL; Chen, SM; Wu, CM |
| 國立交通大學 |
2014-12-08T15:38:44Z |
Pocket implantation effect on drain current flicker noise in analog nMOSFET devices
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Wu, JW; Cheng, CC; Chiu, KL; Guo, JC; Lien, WY; Chang, CS; Huang, GW; Wang, TH |
| 國立交通大學 |
2014-12-08T15:37:13Z |
0.13-mu m RF CMOS and varactors performance optimization by multiple gate layouts
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Ho, CC; Kuo, CW; Chan, Y; Lien, WY; Guo, JC |
| 國立交通大學 |
2014-12-08T15:26:10Z |
0.13 mu m low voltage logic based RF CMOS technology with 115GHz f(T) and 80GHz f(MAX)
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Guo, JC; Huang, CH; Chan, KT; Lien, WY; Wu, CM; Sun, YC |
| 國立交通大學 |
2014-12-08T15:25:47Z |
A simple transmission line de-embedding method for accurate RF CMOS noise modeling
|
Guo, JC; Huang, CH; Lien, WY; Wu, CM |
Showing items 1-5 of 5 (1 Page(s) Totally)
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