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Taiwan Academic Institutional Repository >
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"lin chien ting"
Showing items 51-60 of 81 (9 Page(s) Totally)
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| 國立高雄大學 |
2009-07 |
Effect of Nitrogen Incorporation in a Gd Cap Layer on the Reliability of Deep-Submicrometer Hf-Based High-k/Metal-Gate nMOSFETs
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Hsu, Chia-Wei; Fang, Yean-Kuen; Yeh, Wen-Kuan; Chen, Chun-Yu; Lin, Chien-Ting; Hsu, Che-Hua; Cheng, Li-Wei; Lai, Chien-Ming |
| 國立成功大學 |
2009-07 |
Effect of Nitrogen Incorporation in a Gd Cap Layer on the Reliability of Deep-Submicrometer Hf-Based High-k/Metal-Gate nMOSFETs
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Hsu, Chia-Wei; Fang, Yean-Kuen; Yeh, Wen-Kuan; Chen, Chun-Yu; Lin, Chien-Ting; Hsu, Che-Hua; Cheng, Li-Wei; Lai, Chien-Ming |
| 淡江大學 |
2009-05 |
教育科技專業人員專案管理能力分析之研究
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何俐安; Ho, Li-An; 郭宗賢; Kuo, Tsung-Hsien; 林建廷; Lin, Chien-Ting; 陳怡如; Chen, Yi-Ru; 廖芳君; Liao, Fang-Chun |
| 國立高雄大學 |
2009-03 |
The Impact of Strain Technology on FUSI Gate SOI CMOSFET
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Yeh, Wen-Kuan; Wang, Jean-An; Tsai, Ming-Hsing; Lin, Chien-Ting; Chen, Po-Ying |
| 國立成功大學 |
2008-11 |
Significantly improving sub-90 nm CMOSFET performances with notch-gate enhanced high tensile-stress contact etch stop layer
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Hsu, Chia-Wei; Fang, Yean-Kuen; Yeh, Wen-Kuan; Lin, Chien-Ting |
| 國立高雄大學 |
2008-10 |
Significant improvement of 45 nm and beyond complementary metal oxide semiconductor field effect transistor performance with fully silicided and ultimate spacer process technology
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Hsu, Chia-Wei; Fang, Yean-Kuen; Lin, Chien-Ting; Yeh, Wen-Kuan; Hsu, Che-Hua; Lai, Chieh-Ming; Cheng, Li-Wei; Ma, Mike |
| 國立成功大學 |
2008-09-01 |
Significant improvement of 45 nm and beyond complementary metal oxide semiconductor field effect transistor performance with fully silicided and ultimate spacer process technology
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Hsu, Chia-Wei; Fang, Yean-Kuen; Lin, Chien-Ting; Yeh, Wen-Kuan; Hsu, Che-Hua; Lai, Chieh-Ming; Cheng, Li-Wei; Ma, Mike |
| 國立高雄大學 |
2008-07 |
Significantly improving sub-90 nm CMOSFET performances with notch-gate enhanced high tensile-stress contact etch stop layer
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Hsu, Chia-Wei; Fang, Yean-Kuen; Yeh, Wen-Kuan; Lin, Chien-Ting |
| 國立成功大學 |
2008-04 |
Effect of etch stop layer stress on negative bias temperature instability of deep submicron p-type metal-oxide-semiconductor field effect transistors with dual gate oxide
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Chen, Ming-Shing; Fang, Yean-Kuen; Lee, Tung-Hsing; Lin, Chien-Ting; Chiang, Yen-Ting; Ko, Joe; Sheu, Yau Kae; Shen, Tsong Lin; Liao, Wen Yi |
| 國立高雄大學 |
2008 |
The impact of stain technology on FUSI gate SOI CMOSFET and device performance enhancement for 45nm node and beyond
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Yeh, Wen-Kuan; Wang, Jean-An; Lin, Chien-Ting; Cheng, Li-Wei; Ma, Mike |
Showing items 51-60 of 81 (9 Page(s) Totally)
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