| 國立交通大學 |
2014-12-08T15:32:59Z |
Low-voltage high-speed programming/erasing floating-gate memory device with gate-all-around polycrystalline silicon nanowire
|
Lee, Ko-Hui; Tsai, Jung-Ruey; Chang, Ruey-Dar; Lin, Horng-Chih; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-08T15:32:31Z |
Performance Improvement in RF LDMOS Transistors Using Wider Drain Contact
|
Chen, Kun-Ming; Chen, Bo-Yuan; Chiu, Chia-Sung; Huang, Guo-Wei; Chen, Chun-Hao; Lin, Horng-Chih; Huang, Tiao-Yuan; Chen, Ming-Yi; Yang, Yu-Chi; Jaw, Brenda; Wang, Kai-Li |
| 國立交通大學 |
2014-12-08T15:32:31Z |
Fabrication of High-Performance ZnO Thin-Film Transistors With Submicrometer Channel Length
|
Lin, Horng-Chih; Lyu, Rong-Jhe; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-08T15:31:57Z |
Channel Thickness Effect on High-Frequency Performance of Poly-Si Thin-Film Transistors
|
Chen, Kun-Ming; Tsai, Tzu-I; Lin, Ting-Yao; Lin, Horng-Chih; Chao, Tien-Sheng; Huang, Guo-Wei; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-08T15:31:35Z |
A New Methodology for Probing the Electrical Properties of Heavily Phosphorous-Doped Polycrystalline Silicon Nanowires
|
Lin, Horng-Chih; Lin, Zer-Ming; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-08T15:30:52Z |
Impacts of Nanocrystal Location on the Operation of Trap-Layer-Engineered Poly-Si Nanowired Gate-All-Around SONOS Memory Devices
|
Luo, Cheng-Wei; Lin, Horng-Chih; Lee, Ko-Hui; Chen, Wei-Chen; Hsu, Hsing-Hui; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-08T15:30:35Z |
Novel Method for Fabrication of Tri-Gated Poly-Si Nanowire Field-Effect Transistors With Sublithographic Channel Dimensions
|
Lee, Ko-Hui; Lin, Horng-Chih; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-08T15:30:32Z |
Characterisation of a suspended nanowire channel thin-film transistor with sub-100 nm air gap
|
Kuo, Chia-Hao; Hsu, Chia-Wei; Lin, Horng-Chih; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-08T15:30:25Z |
Characteristics of Planar Junctionless Poly-Si Thin-Film Transistors With Various Channel Thickness
|
Lin, Horng-Chih; Lin, Cheng-I; Lin, Zer-Ming; Shie, Bo-Shiuan; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-08T15:29:51Z |
A Novel Charge-Trapping-Type Memory With Gate-All-Around Poly-Si Nanowire and HfAlO Trapping Layer
|
Lee, Ko-Hui; Lin, Horng-Chih; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-08T15:29:42Z |
Improved Performance of NILC Poly-Si Nanowire TFTs by Using Ni-Gettering
|
Wang, Bau-Ming; Yang, Tzu-Ming; Wu, YewChung Sermon; Su, Chun-Jung; Lin, Horng-Chih |
| 國立交通大學 |
2014-12-08T15:28:34Z |
Investigations of an Independent Double-Gated Polycrystalline Silicon Nanowire Thin Film Transistor for Nonvolatile Memory Operations
|
Chen, Wei-Chen; Lin, Horng-Chih; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-08T15:28:34Z |
Characterizations of polycrystalline silicon nanowire thin-film transistors enhanced by metal-induced lateral crystallization
|
Su, Chun-Jung; Huang, Yu-Feng; Lin, Horng-Chih; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-08T15:28:11Z |
Low-Operating-Voltage Ultrathin Junctionless Poly-Si Thin-Film Transistor Technology for RF Applications
|
Tsai, Tzu-I; Chen, Kun-Ming; Lin, Horng-Chih; Lin, Ting-Yao; Su, Chun-Jung; Chao, Tien-Sheng; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-08T15:25:06Z |
DC and AC NBTI stresses in pMOSFETs with PE-SiN capping
|
Lu, Chia-Yu; Lin, Horng-Chih; Chang, Yi-Feng; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-08T15:24:26Z |
A Novel Double-gated Nanowire TFT and Investigation of Its Size Dependency
|
Chen, Wei-Chen; Lin, Chuan-Ding; Lin, Horng-Chih; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-08T15:24:06Z |
Low-temperature poly-Si nanowire junctionless devices with gate-all-around TiN/Al2O3 stack structure using an implant-free technique
|
Su, Chun-Jung; Tsai, Tzu-I; Lin, Horng-Chih; Huang, Tiao-Yuan; Chao, Tien-Sheng |
| 國立交通大學 |
2014-12-08T15:23:38Z |
Characteristics of n-Type Asymmetric Schottky-Barrier Transistors with Silicided Schottky-Barrier Source and Heavily n-Type Doped Channel and Drain
|
Lin, Zer-Ming; Lin, Horng-Chih; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-08T15:23:36Z |
A Novel Scheme for Fabricating CMOS Inverters With Poly-Si Nanowire Channels
|
Kuo, Chia-Hao; Lin, Horng-Chih; Lee, I-Che; Cheng, Huang-Chung; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-08T15:22:54Z |
Analytical Model of Subthreshold Current and Threshold Voltage for Fully Depleted Double-Gated Junctionless Transistor
|
Lin, Zer-Ming; Lin, Horng-Chih; Liu, Keng-Ming; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-08T15:22:53Z |
A junctionless SONOS nonvolatile memory device constructed with in situ-doped polycrystalline silicon nanowires
|
Su, Chun-Jung; Su, Tuan-Kai; Tsai, Tzu-I; Lin, Horng-Chih; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-08T15:22:31Z |
The Degradation of MILC P-Channel Poly-Si TFTs under Dynamic Hot-Carrier Stress Using a Novel Test Structure
|
Lin, Cheng-I; Hong, Wen-Chiang; Lin, Tin-Fu; Lin, Horng-Chih; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-08T15:22:23Z |
Resistive switching characteristics of multilayered (HfO2/Al2O3)(n) n=19 thin film
|
Tzeng, Wen-Hsien; Zhong, Chia-Wen; Liu, Kou-Chen; Chang, Kow-Ming; Lin, Horng-Chih; Chan, Yi-Chun; Kuo, Chun-Chih; Tsai, Feng-Yu; Tseng, Ming Hong; Chen, Pang-Shiu; Lee, Heng-Yuan; Chen, Frederick; Tsai, Ming-Jinn |
| 國立交通大學 |
2014-12-08T15:21:54Z |
Performance Enhancement of Thin-Film Transistors With Suspended Poly-Si Nanowire Channels by Embedding Silicon Nanocrystals in Gate Nitride
|
Kuo, Chia-Hao; Lin, Horng-Chih; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-08T15:21:15Z |
Relationships between the crystalline phase of an IGZO target and electrical properties of a-IGZO channel film
|
Lee, Yih-Shing; Dai, Zuo-Ming; Lin, Cheng-I; Lin, Horng-Chih |
| 國立交通大學 |
2014-12-08T15:21:10Z |
Characteristics of n-Type Junctionless Poly-Si Thin-Film Transistors With an Ultrathin Channel
|
Lin, Horng-Chih; Lin, Cheng-I; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-08T15:20:40Z |
Read Characteristics of Independent Double-Gate Poly-Si Nanowire SONOS Devices
|
Lin, Horng-Chih; Lin, Zer-Ming; Chen, Wei-Chen; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-08T15:20:10Z |
Tri-gated Poly-Si Nanowire SONOS Devices
|
Hsu, Hsing-Hui; Liu, Ta-Wei; Lin, Chuan-Ding; Chia Kuo-Jung; Huang, Tiao-Yuan; Lin, Horng-Chih |
| 國立交通大學 |
2014-12-08T15:16:49Z |
Improved NBTI in SiN-capped PMOSFETs with ultra-thin HfO2 buffer
|
Lu, Ching-Sen; Lin, Horng-Chih; Chen, Ying-Hung; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-08T15:16:17Z |
Impacts of precursor flow rate and temperature of PECVD-SiN capping films on strained-channel NMOSFETs
|
Lu, Ching-Sen; Lin, Horng-Chih; Lee, Yao-Jen; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-08T15:16:15Z |
Spatially resolving the degradation of SPC thin-film transistors under AC stress
|
Chang, Kai-Hsiang; Lee, Ming-Hsien; Lin, Horng-Chih; Huang, Tiao-Yuan; Lee, Yao-Jen |
| 國立交通大學 |
2014-12-08T15:16:14Z |
A carbon nanotube field effect transistor with tunable conduction-type by electrostatic effects
|
Chen, Bae-Horng; Wei, Jeng-Hua; Lo, Po-Yuan; Wang, Hung-Hsiang; Lai, Ming-Jinn; Tsai, Ming-Jinn; Chao, Tien Sheng; Lin, Horng-Chih; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-08T15:16:08Z |
Correlating drain-current with strain-induced mobility in nanoscale strained CMOSFETs
|
Lin, Hong-Nien; Chen, Hung-Wei; Ko, Chih-Hsin; Ge, Chung-Hu; Lin, Horng-Chih; Huang, Tiao-Yuan; Lee, Wen-Chin |
| 國立交通大學 |
2014-12-08T15:16:00Z |
Prospect of cobalt-mix-tetraethoxysilane method on localized lateral growth of carbon nanotubes for both p- and n-type field effect transistors
|
Chen, Bae-Horng; Lin, Horng-Chih; Huang, Tiao-Yuan; Wei, Jeng-Hua; Hwang, Chien-Liang; Lo, Po-Yuan; Tsai, Ming-Jinn; Chao, Tien Sheng |
| 國立交通大學 |
2014-12-08T15:15:40Z |
Fabrication and characterization of nanowire transistors with solid-phase crystallized poly-Si channels
|
Lin, Horng-Chih; Lee, Ming-Hsien; Su, Chun-Jung; Shen, Shih-Wen |
| 國立交通大學 |
2014-12-08T15:15:29Z |
Characterizing the channel backscattering behavior in nanoscale strained complementary metal oxide semiconductor field-effect transistors
|
Lin, Hono-Nien; Chen, Hung-Wei; Ko, Chih-Hsin; Ge, Chung-Hu; Lin, Horng-Chih; Huang, Tiao-Yuan; Lee, Wen-Chin |
| 國立交通大學 |
2014-12-08T15:14:39Z |
Spatially and temporally resolving the degradation of n-channel poly-Si thin-film transistors under hot-carrier stressing
|
Lee, Ming-Hsien; Chang, Kai-Hsiang; Lin, Horng-Chih |
| 國立交通大學 |
2014-12-08T15:14:38Z |
Impacts of SiN-capping layer on the device characteristics and hot-carrier degradation of nMOSFETs
|
Lu, Chia-Yu; Lin, Horng-Chih; Lee, Yao-Jen; Shie, Yu-Lin; Chao, Chih-Cheng |
| 國立交通大學 |
2014-12-08T15:14:31Z |
High-performance poly-Si nanowire NMOS transistors
|
Lin, Horng-Chih; Su, Chun-Jung |
| 國立交通大學 |
2014-12-08T15:14:29Z |
Impacts of a polycrystalline-silicon buffer layer on the performance and reliability of strained n-channel metal-oxide-semiconductor field-effect transistors with SiN capping
|
Lu, Ching-Sen; Lin, Horng-Chih; Huang, Jian-Ming; Lee, Yao-Jen |
| 國立交通大學 |
2014-12-08T15:13:27Z |
Effective density-of-states distribution of polycrystalline silicon thin-film transistors under hot-carrier degradation
|
Lee, Ming-Hsien; Chang, Kai-Hsiang; Lin, Horng-Chih |
| 國立交通大學 |
2014-12-08T15:13:23Z |
An innovative understanding of metal-insulator-metal (MIM)-capacitor degradation under constant-current stress
|
Hung, Chi-Chao; Oates, Anthony S.; Lin, Horng-Chih; Chang, Yu-En Percy; Wang, Jia-Lian; Huang, Cheng-Chung; Yau, You-Wen |
| 國立交通大學 |
2014-12-08T15:13:06Z |
Water passivation effect on polycrystalline silicon nanowires
|
Lin, Horng-Chih; Su, Chun-Jung; Hsiao, Cheng-Yun; Yang, Yuh-Shyong; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-08T15:12:51Z |
A simple method for sub-100 nm pattern generation with I-line double-patterning technique
|
Tsai, Tzu-I; Lin, Horng-Chih; Jian, Min-Feng; Huang, Tiao-Yuan; Chao, Tien-Sheng |
| 國立交通大學 |
2014-12-08T15:12:04Z |
Impacts of Multiple-Gated Configuration on the Characteristics of Poly-Si Nanowire SONOS Devices
|
Hsu, Hsing-Hui; Lin, Horng-Chih; Luo, Cheng-Wei; Su, Chun-Jung; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-08T15:11:58Z |
Fabrication of sub-100-nm metal-oxide-semiconductor field-effect transistors with asymmetrical source/drain using I-line double patterning technique
|
Lin, Horng-Chih; Tsai, Tzu-I; Chao, Tien-Sheng; Jian, Min-Feng; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-08T15:11:50Z |
Gate-All-Around Junctionless Transistors With Heavily Doped Polysilicon Nanowire Channels
|
Su, Chun-Jung; Tsai, Tzu-I; Liou, Yu-Ling; Lin, Zer-Ming; Lin, Horng-Chih; Chao, Tien-Sheng |
| 國立交通大學 |
2014-12-08T15:11:16Z |
A novel multiple-gate polycrystalline silicon nanowire transistor featuring an inverse-T gate
|
Lin, Horng-Chih; Hsu, Hsing-Hui; Su, Chun-Jung; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-08T15:10:41Z |
Fabrication and Characterization of Multiple-Gated Poly-Si Nanowire Thin-Film Transistors and Impacts of Multiple-Gate Structures on Device Fluctuations
|
Hsu, Hsing-Hui; Liu, Ta-Wei; Chan, Leng; Lin, Chuan-Ding; Huang, Tiao-Yuan; Lin, Horng-Chih |
| 國立交通大學 |
2014-12-08T15:10:06Z |
Performance Improvement of Polycrystalline Silicon Nanowire Thin-Film Transistors by a High-k Capping Layer
|
Lee, Ko-Hui; Hsu, Hsing-Hui; Lin, Horng-Chih; Huang, Tiao-Yuan |
