| 國立交通大學 |
2017-04-21T06:49:47Z |
Stability of InGaZnO Thin-Film Transistors with Durimide Passivation
|
Shie, Bo-Shiuan; Chang, Chih-Bin; Chang, Hao-Chun; Lin, Horng-Chih; Huang, Tiao-Yuan |
| 國立交通大學 |
2017-04-21T06:49:44Z |
Comparison of Electrical Characteristics of N-type Silicon Junctionless Transistors with and without Film Profile Engineering by TCAD Simulation
|
Tsai, Jung-Ruey; Lin, Horng-Chih; Chang, Hsiu-Fu; Shie, Bo-Shiuan; Wen, Ting-Ting; Huang, Tiao-Yuan |
| 國立交通大學 |
2017-04-21T06:49:25Z |
High-gain, Low-voltage BEOL Logic Gate Inverter Built with Film Profile Engineered IGZO Transistors
|
Lyu, Rong-Jhe; Chiu, Yun-Hsuan; Lin, Horng-Chih; Li, Pei-Wen; Huang, Tiao-Yuan |
| 國立交通大學 |
2017-04-21T06:49:10Z |
Impacts of a buffer layer and hi-wafers on the performance of strained-channel NMOSFETs with SiN capping layer
|
Tsai, Tzu-, I; Lee, Yao-Jen; Chen, King-Sheng; Wang, Jeff; Wan, Chia-Chen; Hsueh, Fu-Kuo; Lin, Horng-Chih; Chao, Tien-Sheng; Huang, Tiao-Yuan |
| 國立交通大學 |
2017-04-21T06:49:10Z |
Comparisons on performance improvement by nitride capping layer among different channel directions nMOSFETs
|
Tsai, Tzu-, I; Lee, Yao-Jen; Chen, King-Sheng; Wang, Jeff; Hsueh, Fu-Kuo; Lin, Horng-Chih; Huang, Tiao-Yuan |
| 國立交通大學 |
2017-04-21T06:49:10Z |
Reliability of strained-channel NMOSFETs with SiN capping layer on Hi-wafers with a thin LPCVD-TEOS buffer layer
|
Tsai, Tzu-, I; Lee, Yao-Jen; Chen, King-Sheng; Wang, Jeff; Wan, Chia-Chen; Hsueh, Fu-Kuo; Lin, Horng-Chih; Cha, Tien-Sheng; Huang, Tiao-Yuan |
| 國立交通大學 |
2017-04-21T06:49:09Z |
Short-Channel BEOL ZnON Thin-Film Transistors with Superior Mobility Performance
|
Kuan, Chin-I; Lin, Horng-Chih; Li, Pei-Wen; Huang, Tiao-Yuan |
| 國立交通大學 |
2017-04-21T06:49:06Z |
Film-Profile-Engineered IGZO Thin-Film Transistors with Gate/Drain Offset for High Voltage Operation
|
Wu, Ming-Hung; Lin, Horng-Chih; Li, Pei-Wen; Huang, Tiao-Yuan |
| 國立交通大學 |
2017-04-21T06:48:58Z |
Impact of gate dielectrics and oxygen annealing on tin-oxide thin-film transistors
|
Zhong, Chia-Wen; Lin, Horng-Chih; Tsai, Jung-Ruey; Liu, Kou-Chen; Huang, Tiao-Yuan |
| 國立交通大學 |
2017-04-21T06:48:54Z |
Failure Analysis of Gate-all-around Nanowire Field Effect Transistor Under TLP Test
|
Zhang, Guoyan; Dong, Aihua; Liu, Nie; Tian, Rui; Yang, Xuejiao; Liu, Zhiwei; Lee, Kohui; Lin, Horng-Chih; Liou, Juin J.; Wang Yuxin |
| 國立交通大學 |
2017-04-21T06:48:46Z |
Short-Channel ZnON Thin-Film Transistors with Film Profile Engineering
|
Kuan, Chin-I; Lin, Horng-Chih; Li, Pei-Wen; Huang, Tiao-Yuan |
| 國立交通大學 |
2017-04-21T06:48:46Z |
Fabrication and RTN Characteristics of Gate-All-Around Poly-Si Junctionless Nanowire Transistors
|
Yang, Chen-Chen; Chen, Yung-Chen; Lin, Horng-Chih; Chang, Ruey-Dar; Li, Pei-Wen; Huang, Tiao-Yuan |
| 國立交通大學 |
2017-04-21T06:48:25Z |
Strain-induced channel backscattering modulation in nanoscale CMOSFETs
|
Chen, Hung-Wei; Lin, Hong-Nien; Ko, Chih-Hsin; Ge, Chung-Hu; Lin, Horng-Chih; Huang, Tiao-Yuan; Lee, Wen-Chin |
| 國立交通大學 |
2016-03-29T00:01:14Z |
應用氧化物半導體薄膜電晶體之反相器的研製
|
林鴻志; LIN HORNG-CHIH |
| 國立交通大學 |
2016-03-28T08:17:36Z |
金屬氧化物後段主動元件技術開發
|
林鴻志; LIN HORNG-CHIH |
| 國立交通大學 |
2016-03-28T08:17:26Z |
應用氧化物半導體薄膜電晶體之反相器的研製
|
林鴻志; LIN HORNG-CHIH |
| 國立交通大學 |
2016-03-28T00:04:26Z |
Impact of thermal oxygen annealing on the properties of tin oxide films and characteristics of p-type thin-film transistors
|
Zhong, Chia-Wen; Lin, Horng-Chih; Liu, Kou-Chen; Huang, Tiao-Yuan |
| 國立交通大學 |
2015-12-02T02:59:28Z |
Improving Electrical Performances of p-Type SnO Thin-Film Transistors Using Double-Gated Structure
|
Zhong, Chia-Wen; Lin, Horng-Chih; Liu, Kou-Chen; Huang, Tiao-Yuan |
| 國立交通大學 |
2015-12-02T02:59:25Z |
Novel InGaZnO inverters utilizing film profile engineering
|
Lin, Horng-Chih; Wu, Ming-Hung; Chan, Chin-Wen; Lyu, Rong-Jhe; Huang, Tiao-Yuan |
| 國立交通大學 |
2015-12-02T02:59:17Z |
Film-Profile Engineered InGaZnO Thin-Film Transistors With Self-Aligned Bottom Gates
|
Shie, Bo-Shiuan; Lin, Horng-Chih; Huang, Tiao-Yuan |
| 國立交通大學 |
2015-12-02T02:59:17Z |
Impact of Residual Hardmask Wires on the Performance of Film-Profile-Engineered ZnO Thin-Film Transistors With Discrete Bottom Gates
|
Lyu, Rong-Jhe; Lin, Horng-Chih; Huang, Tiao-Yuan |
| 國立交通大學 |
2015-11-26T01:06:38Z |
以氧化鉿為介電層的電阻式記憶體之電性與分析
|
王佳文; Wang, Chia-Wen; 林鴻志; 黃調元; Lin, Horng-Chih; Huang, Tiao-Yuan |
| 國立交通大學 |
2015-11-26T01:04:09Z |
未摻雜之氧化鋅薄膜電晶體的製作與特性分析
|
李信宏; Shin-Hung Li; 林鴻志; 黃調元; Lin, Horng-Chih; Huang, Tiao-Yuan |
| 國立交通大學 |
2015-11-26T01:04:09Z |
a-IGZO 薄膜電晶體的製作與特性分析
|
張維軒; Chang, Wei-Hsuan; 林鴻志; 黃調元; Lin, Horng-Chih; Huang, Tiao-Yuan |
| 國立交通大學 |
2015-11-26T00:57:16Z |
探討保護層對於非晶態銦鎵鋅氧化物薄膜電晶體穩定性之影響
|
張智斌; Chang, Chih-Bin; 林鴻志; 黃調元; Lin, Horng-Chih; Huang, Tiao-Yuan |
| 國立交通大學 |
2015-11-26T00:57:15Z |
氮化矽側壁硬式光罩製造之環繞式閘極多晶矽無接面奈米線薄膜電晶體特性研究
|
簡崇哲; Chien, Chung-Che; 林鴻志; 黃調元; Lin, Horng-Chih; Huang, Tiao-Yuan |
| 國立交通大學 |
2015-11-26T00:57:14Z |
無機保護層對一氧化錫薄膜電晶體特性與穩定度之影響探討
|
蔡昕佑; Tsai, Hsin-You; 林鴻志; 黃調元; Lin, Horng-Chih; Huang, Tiao-Yuan |
| 國立交通大學 |
2015-11-26T00:56:11Z |
平面式與三閘極結構之N型無接面多晶矽薄膜電晶體的研製與分析
|
林政頤; Lin, Cheng-I; 林鴻志; 黃調元; Lin, Horng-Chih; Huang, Tiao-Yuan |
| 國立交通大學 |
2015-07-21T11:20:45Z |
Fabrication of High-Performance Poly-Si Thin-Film Transistors With Sub-Lithographic Channel Dimensions
|
Lee, Ko-Hui; Lin, Horng-Chih; Huang, Tiao-Yuan |
| 國立交通大學 |
2015-07-21T11:20:25Z |
Effects of Gate Dielectric and Process Treatments on the Electrical Characteristics of IGZO TFTs With Film Profile Engineering
|
Shie, Bo-Shiuan; Lin, Horng-Chih; Lyu, Rong-Jye; Huang, Tiao-Yuan |
| 國立交通大學 |
2015-07-21T08:31:07Z |
Film Profile Engineering (FPE): A New Concept for Manufacturing of Short-Channel Metal Oxide TFTs
|
Lyu, Rong-Jhe; Lin, Horng-Chih; Wu, Ming-Hung; Shie, Bo-Shiuan; Hung, Hsiang-Ting; Huang, Tiao-Yuan |
| 國立交通大學 |
2015-05-12T02:59:40Z |
Method for fabricating thin-film transistor
|
Lin Horng-Chih; Lyu Rong-Jhe |
| 國立交通大學 |
2014-12-16T06:15:50Z |
NONVOLATILE MEMORY DEVICE WITH NANOWIRE CHANNEL AND METHOD FOR FABRICATING THE SAME
|
LIN, Horng-Chih; Su, Chun-Jung; Hsu, Hsin-Hwei |
| 國立交通大學 |
2014-12-16T06:14:40Z |
METHOD FOR FABRICATING THIN-FILM TRANSISTOR
|
LIN HORNG-CHIH; LYU RONG-JHE |
| 國立交通大學 |
2014-12-16T06:14:18Z |
Suspended nanochannel transistor structure and method for fabricating the same
|
Lin Horng-Chih; Su Chun-Jung; Hsu Hsing-Hui; Li Guan-Jang |
| 國立交通大學 |
2014-12-13T10:51:02Z |
用於先進邏輯元件件與感測器應用之新式矽奈米線電晶體技術
|
林鴻志; LIN HORNG-CHIH |
| 國立交通大學 |
2014-12-13T10:48:14Z |
用於先進邏輯元件件與感測器應用之新式矽奈米線電晶體技術
|
林鴻志; LIN HORNG-CHIH |
| 國立交通大學 |
2014-12-13T10:44:10Z |
應用於三維邏輯電路與非揮發性記憶體之先進奈米線技術
|
林鴻志; LIN HORNG-CHIH |
| 國立交通大學 |
2014-12-13T10:43:22Z |
應用於三維邏輯電路與非揮發性記憶體之先進奈米線技術
|
林鴻志; LIN HORNG-CHIH |
| 國立交通大學 |
2014-12-13T10:42:55Z |
面板低溫記憶體元件技術開發
|
林鴻志; LIN HORNG-CHIH |
| 國立交通大學 |
2014-12-13T10:41:39Z |
應用於三維邏輯電路與非揮發性記憶體之先進奈米線技術
|
林鴻志; LIN HORNG-CHIH |
| 國立交通大學 |
2014-12-13T10:41:20Z |
面板低溫記憶體元件技術開發
|
林鴻志; LIN HORNG-CHIH |
| 國立交通大學 |
2014-12-13T10:37:27Z |
金屬氧化物後段主動元件技術開發
|
林鴻志; LIN HORNG-CHIH |
| 國立交通大學 |
2014-12-13T10:36:47Z |
金屬氧化物後段主動元件技術開發
|
林鴻志; LIN HORNG-CHIH |
| 國立交通大學 |
2014-12-13T10:29:25Z |
新式矽奈米線電晶體製作與分析
|
林鴻志; LIN HORNG-CHIH |
| 國立交通大學 |
2014-12-13T10:29:20Z |
具有形變通道之互補式金氧半電晶體載子穿輸與可靠性分析
|
林鴻志; LIN HORNG-CHIH |
| 國立交通大學 |
2014-12-13T10:29:09Z |
用於先進邏輯元件件與感測器應用之新式矽奈米線電晶體技術
|
林鴻志; LIN HORNG-CHIH |
| 國立交通大學 |
2014-12-12T03:03:03Z |
電漿製程導致先進互補式金氧半場效電晶體可靠度損壞之研究
|
翁武得; Weng, Wu-Te; 黃調元; 林鴻志; Huang, Tiao-Yuan; Lin, Horng-Chih |
| 國立交通大學 |
2014-12-12T02:42:14Z |
薄膜輪廓工法－氧化鋅薄膜電晶體之製作與特性分析
|
陳品岑; Chen, Pin-Tseng; 林鴻志; 黃調元; Lin, Horng-Chih; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-12T02:42:14Z |
一氧化錫薄膜電晶體的製作與特性分析
|
陳旭培; Chen, Hsu-Pei; 林鴻志; 黃調元; Lin, Horng-Chih; Huang, Tiao-Yuan |
