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"lin ing chao"的相關文件
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| 國立成功大學 |
2016-07 |
Reducing Aging Effects on Ternary CAM
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Lin, Ing-Chao; Lee, Yen-Han; Wang, Sheng-Wei |
| 國立成功大學 |
2015-11-13 |
Electronic device having scratchpad memory and management method for scratchpad memory
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Chang, Ta-Wei;Lin, Ing-Chao;Su, Wen-Yu;Chien, Yu-Shiang |
| 國立成功大學 |
2015-10 |
High-Endurance Hybrid Cache Design in CMP Architecture With Cache Partitioning and Access-Aware Policies
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Lin, Ing-Chao; Chiou, Jeng-Nian |
| 國立成功大學 |
2015-09 |
High-Performance Low-Power Carry Speculative Addition With Variable Latency
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Lin, Ing-Chao; Yang, Yi-Ming; Lin, Cheng-Chian |
| 國立交通大學 |
2015-07-21T11:20:26Z |
BTI-Aware Sleep Transistor Sizing Algorithm for Reliable Power Gating Designs
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Wu, Kai-Chiang; Lin, Ing-Chao; Wang, Yao-Te; Yang, Shuen-Shiang |
| 國立成功大學 |
2015-03 |
Aging-Aware Reliable Multiplier Design With Adaptive Hold Logic
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Lin, Ing-Chao; Cho, Yu-Hung; Yang, Yi-Ming |
| 國立成功大學 |
2014-12 |
CASA: Contention-Aware Scratchpad Memory Allocation for Online Hybrid On-Chip Memory Management
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Chang, Da-Wei; Lin, Ing-Chao; Chien, Yu-Shiang; Lin, Chin-Lun; Su, Alvin W. -Y.; Young, Chung-Ping |
| 國立成功大學 |
2014-10 |
BTI-Aware Sleep Transistor Sizing Algorithm for Reliable Power Gating Designs
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Wu, Kai-Chiang; Lin, Ing-Chao; Wang, Yao-Te; Yang, Shuen-Shiang |
| 國立成功大學 |
2014-09 |
NBTI Tolerance and Leakage Reduction Using Gate Sizing
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Lin, Ing-Chao; Syu, Shun-Ming; Ho, Tsung-Yi |
| 國立成功大學 |
2014-09 |
NBTI and Leakage Reduction Using ILP-Based Approach
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Lin, Ing-Chao; Li, Kuan-Hui; Lin, Chia-Hao; Wu, Kai-Chiang |
| 國立成功大學 |
2014-01 |
Capture-Power-Safe Test Pattern Determination for At-Speed Scan-Based Testing
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Li, Yi-Hua; Lien, Wei-Cheng; Lin, Ing-Chao; Lee, Kuen-Jong |
| 國立成功大學 |
2013-01 |
Leakage and Aging Optimization Using Transmission Gate-Based Technique
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Lin, Ing-Chao; Lin, Chin-Hong; Li, Kuan-Hui |
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