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Taiwan Academic Institutional Repository >
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"lin j m"
Showing items 81-90 of 132 (14 Page(s) Totally)
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| 臺大學術典藏 |
2018-09-10T04:53:44Z |
TCG-S: Orthogonal coupling of P*-admissible representations for general floorplans
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Lin, J.-M.; Chang, Y.-W.; YAO-WEN CHANG |
| 臺大學術典藏 |
2018-09-10T04:33:02Z |
Graph matching-based algorithms for array-based FPGA segmentation design and routing
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Lin, J.-M.; Pan, S.-R.; Chang, Y.-W.; YAO-WEN CHANG |
| 臺大學術典藏 |
2018-09-10T04:12:53Z |
Module placement with boundary constraints using B*-trees
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Lin, J.-M.; Yi, H.-E.; Chang, Y.-W.; YAO-WEN CHANG |
| 臺大學術典藏 |
2018-09-10T04:12:53Z |
Arbitrary convex and concave rectilinear module packing using TCG
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Lin, J.-M.; Chen, H.-L.; Chang, Y.-W.; YAO-WEN CHANG |
| 臺大學術典藏 |
2018-09-10T04:12:53Z |
Arbitrarily shaped rectilinear module placement using the transitive closure graph representation
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Lin, J.-M.; Chen, H.-L.; Chang, Y.-W.; YAO-WEN CHANG |
| 臺大學術典藏 |
2018-09-10T04:12:52Z |
Performance-driven placement for dynamically reconfigurable FPGAs
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Wu, G.-M.; Lin, J.-M.; Chang, Y.-W.; Wu, Guang-Ming; Lin, Jai-Ming; Chang, Yao-Wen; YAO-WEN CHANG |
| 臺大學術典藏 |
2018-09-10T03:47:58Z |
Generic ILP-based approaches for time-multiplexed FPGA partitioning
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Wu, G.-M.; Lin, J.-M.; Chang, Y.-W.; YAO-WEN CHANG |
| 國立臺灣科技大學 |
2017 |
I-stylist: Finding the right dress through your social networks
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Sanchez-Riera, J;Lin, J.-M;Hua, K.-L;Cheng, W.-H;Tsui, A.W. |
| 國立臺灣科技大學 |
2017 |
A 2.5-ps bin size and 6.7-ps resolution FPGA time-to-digital converter based on delay wrapping and averaging
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Chen, P;Hsiao, Y.-Y;Chung, Y.-S;Tsai, W.X;Lin, J.-M. |
| 國立成功大學 |
2017 |
Regularity-aware routability-driven placement prototyping algorithm for hierarchical mixed-size circuits
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Lin, J.-M.;Yu, B.-H.;Chang, L.-Y. |
Showing items 81-90 of 132 (14 Page(s) Totally)
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