English  |  正體中文  |  简体中文  |  总笔数 :0  
造访人次 :  53285719    在线人数 :  633
教育部委托研究计画      计画执行:国立台湾大学图书馆
 
臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)
关于TAIR

浏览

消息

著作权

相关连结

"lin jer yi"的相关文件

回到依作者浏览
依题名排序 依日期排序

显示项目 1-10 / 12 (共2页)
1 2 > >>
每页显示[10|25|50]项目

机构 日期 题名 作者
國立交通大學 2019-04-02T05:59:37Z Junctionless FETs With a Fin Body for Multi-V-TH and Dynamic Threshold Operation Kumar, Malkundi Puttaveerappa Vijay; Lin, Jer-Yi; Kao, Kuo-Hsing; Chao, Tien-Sheng
國立交通大學 2019-04-02T05:58:35Z Variable-Channel Junctionless Poly-Si FETs: Demonstration and Investigation With Different Body Doping Concentrations Lin, Jer-Yi; Tsai, Chan-Yi; Shen, Chiuan-Huei; Chung, Chun-Chih; Kumar, Malkundi Puttaveerappa Vijay; Chao, Tien-Sheng
國立交通大學 2018-08-21T05:54:11Z Comprehensive Analysis on Electrical Characteristics of Pi-Gate Poly-Si Junctionless FETs Hsieh, Dong-Ru; Lin, Jer-Yi; Kuo, Po-Yi; Chao, Tien-Sheng
國立交通大學 2018-08-21T05:53:13Z Vertically Stacked Cantilever n-Type Poly-Si Junctionless Nanowire Transistor and Its Series Resistance Limit Chung, Chris Chun-Chih; Shen, Chiuan-Huei; Lin, Jer-Yi; Chin, Chun-Chieh; Chao, Tien-Sheng
國立交通大學 2018-08-21T05:53:08Z Junctionless Nanosheet (3 nm) Poly-Si TFT: Electrical Characteristics and Superior Positive Gate Bias Stress Reliability Lin, Jer-Yi; Kumar, Malkundi Puttaveerappa Vijay; Chao, Tien-Sheng
國立交通大學 2017-04-21T06:56:35Z High-performance sidewall damascened tri-gate poly-si TFTs with the strain proximity free technique and stress memorization technique Hsieh, Dong-Ru; Kuo, Po-Yi; Lin, Jer-Yi; Chen, Yi-Hsuan; Chang, Tien-Shun; Chao, Tien-Sheng
國立交通大學 2017-04-21T06:56:21Z Junctionless Poly-Si Nanowire Transistors With Low-Temperature Trimming Process for Monolithic 3-D IC Application Lin, Jer-Yi; Kuo, Po-Yi; Lin, Ko-Li; Chin, Chun-Chieh; Chao, Tien-Sheng
國立交通大學 2017-04-21T06:55:58Z High-Performance Pi-Gate Poly-Si Junctionless and Inversion Mode FET Hsieh, Dong-Ru; Lin, Jer-Yi; Kuo, Po-Yi; Chao, Tien-Sheng
國立交通大學 2017-04-21T06:50:13Z Investigation of Hot Carrier Reliability of Ultrathin Poly-Si Nanobelt Junctionless (UTNB-JL) Transistors on Different Underlying Insulators Chang, Jen-Hong; Chung, Chun-Chih; Lin, Jer-Yi; Chao, Tien-Sheng
國立交通大學 2017-04-21T06:48:46Z Fabrication and Characterization of Pi-Gate Poly-Si Junctionless and Inversion Mode Fin-FETs for 3-D IC Applications Hsieh, Don-Ru; Lin, Jer-Yi; Kuo, Po-Yi; Chao, Tien-Sheng

显示项目 1-10 / 12 (共2页)
1 2 > >>
每页显示[10|25|50]项目