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Institution Date Title Author
淡江大學 1995-02 On the construction of a prolog-based verifier for systolic array designs 施國琛; Shih, Timothy K.; Ling, Nam; Davis, Ruth; Lin, Fuyau
淡江大學 1994-09 A Temporal Arithmetic Based Reasoning System for Systolic Array Designs 施國琛; Shih, Timothy K.; Ling, Nam
淡江大學 1993-08 VSTA : a prolog-based formal verifier for systolic array designs Ling, Nam; 施國琛; Shih, Timothy K.
淡江大學 1991-11 An automatic design specification and verification tool for systolic array designe Lin, Fu-yau; 施國琛; Shih, Timothy K.; Ling, Nam

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