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| 國立交通大學 |
2014-12-08T15:26:32Z |
A novel and direct determination of the interface traps in sub-100nm CMOS devices with direct tunneling regime (12 similar to 16A) gate oxide
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Chung, SS; Chen, SJ; Yang, CK; Cheng, SM; Lin, SH; Sheng, YC; Lin, HS; Hung, KT; Wu, DY; Yew, TR; Chien, SC; Liou, FT; Wen, F |
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