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教育部委託研究計畫 計畫執行:國立臺灣大學圖書館
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"liu chih wei"的相關文件
顯示項目 26-35 / 121 (共13頁)
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| 國立交通大學 |
2017-04-21T06:55:52Z |
A Systematic ANSI S1.11 Filter Bank Specification Relaxation and Its Efficient Multirate Architecture for Hearing-Aid Systems
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Yang, Cheng-Yen; Liu, Chih-Wei; Jou, Shyh-Jye |
| 國立交通大學 |
2017-04-21T06:49:31Z |
Binaural-Cue-Based Noise Reduction Using Multirate Quasi-ANSI Filter Bank for Hearing Aids
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Tang, Huei-Shiuan; Yang, Cheng-Yen; Liu, Chih Wei; Chien, Chia-Cheng |
| 國立交通大學 |
2017-04-21T06:49:25Z |
DeAr: A Framework for Power-efficient and Flexible Embedded Digital Signal Processor Design
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Lee, Chi-Ming; Huang, Yong-Jyun; Liu, Chih-Wei; Hsu, Yarsun |
| 國立交通大學 |
2017-04-21T06:49:05Z |
A Variable-Latency, Ultra-Low-Voltage RISC Processor with a New In-Situ Error Detection and Correction Technique
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Lin, Chi-Chun; Chang, Kuo-Chiang; Liu, Chih-Wei |
| 國立成功大學 |
2016-10-26 |
Power integrated circuit implementation of optimal adaptive voltage positioning scheme using progressive waveform shaping algorithm
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Liu, Chih-Wei; Chang-Chien, Le-Ren |
| 國立交通大學 |
2015-12-04T07:03:13Z |
VARIABLE-LATENCY SPECULATING PIPELINED BOOTH MULTIPLIER WITH STATISTICAL CARRY ESTIMATION FOR ERROR DETECTION AND RECOVERY
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Liu Chih-Wei; Chen Shin-Kai; Chang Kuo-Chiang; Wu Tsung-Yi; Tsai An-Chi |
| 國立交通大學 |
2015-12-02T03:00:54Z |
Optimized Memory Access Support for Data Layout Conversion on Heterogeneous Multi-core Systems
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Hsu, Chia-Chen; Lin, Cheng-Yen; Chen, Shin Kai; Liu, Chih-Wei; Lee, Jenq-Kuen |
| 國立交通大學 |
2015-12-02T03:00:49Z |
Complexity-Effective Implementation of Programmable FIR Filters Using Simplified Canonic Signed Digit Multiplier
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Chang, Kuo-Chiang; Lin, Ching-Hao; Liu, Chih-Wei |
| 國立交通大學 |
2015-11-26T01:02:08Z |
60 GHz多載波濾波器組系統之相位雜訊消除與取樣頻率偏移追蹤等化器
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姚宇誠; Yao, Yu-Cheng; 周世傑; 劉志尉; Jou, Shyh-Jye; Liu, Chih-Wei |
| 國立交通大學 |
2015-11-26T00:56:51Z |
適用於HEVC之快速移動估測演算法與硬體架構設計
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張仲華; Chang,Chung-Hua; 劉志尉; Liu, Chih-Wei |
顯示項目 26-35 / 121 (共13頁)
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