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Taiwan Academic Institutional Repository >
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"lu s k"
Showing items 21-30 of 70 (7 Page(s) Totally)
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| 國立臺灣科技大學 |
2017 |
Adaptive block-based refresh techniques for mitigation of data retention faults and reduction of refresh power
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Lu, S.-K.;Huang, Huang H.-K. |
| 國立臺灣科技大學 |
2017 |
Electrical tests for capacitive open defects in assembled PCBs
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Alia, F.A.B.;Odoriba, A.;Hashizume, M.;Yotsuyanagi, H.;Lu, S.-K. |
| 國立臺灣科技大學 |
2017 |
Electrical test of resistive and capacitive open defects at data bus in 3D memory IC
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Hashizume, M.;Shiraishi, Y.;Yotsuyanagi, H.;Yokoyama, H.;Tada, Tada T.;Lu, S.-K. |
| 國立臺灣科技大學 |
2017 |
Resistive open defects detected by interconnect testing based on charge volume injected to 3D ICs
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Ohtani, K.;Osato, N.;Hashizume, M.;Yotsuyanagi, H.;Lu, S.-K. |
| 國立臺灣科技大學 |
2017 |
A built-in current sensor made of a comparator of offset cancellation type for electrical interconnect tests of 3D ICs
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Kanda, M.;Hashizume, M.;Yotsuyanagi, H.;Lu, S.-K. |
| 國立臺灣科技大學 |
2016 |
A Framework for Third Party Android Marketplaces to Identify Repackaged Apps
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Lo, N.-W;Lu, S.-K;Chuang, Y.-H. |
| 國立臺灣科技大學 |
2016 |
Integrated heterogeneous infrastructure for indoor positioning
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Ma, Y.-W;Chen, J.-L;Tsai, Y.-H;Chou, P.-C;Lu, S.-K;Kuo, S.-Y. |
| 國立臺灣科技大學 |
2016 |
Integration of Hard Repair Techniques with ECC for Enhancing Fabrication Yield and Reliability of Embedded Memories
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Lu, S.-K;Tsai, C.-J;Hashizume, M. |
| 國立臺灣科技大學 |
2016 |
A built-in electrical test circuit for detecting open leads in assembled PCB circuits
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Miyabe, T;Hashizume, M;Yotsuyanagi, H;Lu, S.-K;Roth, Z. |
| 國立臺灣科技大學 |
2016 |
Electrical interconnect test of solder joint part with boundary scan flip flops and a built-in test circuit
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Hashizume, M;Ikiri, Y;Konishi, T;Yotsuyanagi, H;Lu, S.-K. |
Showing items 21-30 of 70 (7 Page(s) Totally)
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