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"luo g l"的相关文件
显示项目 1-10 / 28 (共3页)
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| 國立成功大學 |
2023 |
First Demonstration of Defect Elimination for Cryogenic Ge FinFET CMOS Inverter Showing Steep Subthreshold Slope by Using Ge-on-Insulator Structure
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Yu, X.-R.;Hsieh, C.-C.;Chuang, M.-H.;Chiu, M.-Y.;Sun, T.-C.;Geng, W.-Z.;Chang, W.-H.;Shih, Y.-J.;Lu, W.-H.;Chang, W.-C.;Lin, Y.-C.;Pai, Y.-C.;Lai, C.-Y.;Chuang, M.-H.;Dei, Y.;Yang, C.-Y.;Lu, H.-Y.;Lin, N.-C.;Wu, C.-T.;Kao, Kao K.-H.;Ma, W.C.-Y.;Lu, D.D.;Lee, Y.-J.;Luo, G.-L.;Chiang, M.-H.;Maeda, T.;Wu, Wu W.-F.;Li, Y.-M.;Hou, T.-H. |
| 國立成功大學 |
2022 |
Demonstration of Monolayer Doping of Five-Stacked Ge Nanosheet Field-Effect Transistors
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Chu, Chu C.-L.;Luo, G.-L.;Chou, D.;Hsu, S.-H. |
| 國立成功大學 |
2022 |
First Demonstration of Vertical Stacked Hetero-Oriented n-Ge (111)/p-Ge (100) CFET toward Mobility Balance Engineering
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Yu, X.-R.;Chang, W.-H.;Hong, T.-C.;Sung, P.-J.;Agarwal, Agarwal A.;Luo, G.-L.;Wu, C.-T.;Kao, Kao K.-H.;Su, C.-J.;Chang, S.-W.;Lu, W.-H.;Fu, P.-Y.;Lin, J.-H.;Wu, P.-H.;Cho, T.-C.;Ma, W.C.-Y.;Lu, D.-D.;Chao, T.-S.;Maeda, T.;Lee, Y.-J.;Wu, Wu W.-F.;Yeh, W.-K.;Wang, Y.-H. |
| 國立成功大學 |
2022 |
Integration Design and Process of 3-D Heterogeneous 6T SRAM with Double Layer Transferred Ge/2Si CFET and IGZO Pass Gates for 42% Reduced Cell Size
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Yu, X.-R.;Chuang, M.-H.;Chang, S.-W.;Chang, W.-H.;Hong, T.-C.;Chiang, Chiang C.-H.;Lu, W.-H.;Yang, C.-Y.;Chen, W.-J.;Lin, J.-H.;Wu, P.-H.;Sun, T.-C.;Kola, S.;Yang, Yang Y.-S.;Da, Y.;Sung, P.-J.;Wu, C.-T.;Cho, T.-C.;Luo, G.-L.;Kao, Kao K.-H.;Chiang, M.-H.;Ma, W.C.-Y.;Su, C.-J.;Chao, T.-S.;Maeda, T.;Samukawa, Samukawa S.;Li, Y.;Lee, Y.-J.;Wu, Wu W.-F.;Tarng, J.-H.;Wang, Y.-H. |
| 臺大學術典藏 |
2020-06-11T06:20:29Z |
Voltage Transfer Characteristic Matching by Different Nanosheet Layer Numbers of Vertically Stacked Junctionless CMOS Inverter for SoP/3D-ICs applications
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Wu, C.-T.; Huang, Y.-M.; Hou, F.-J.; Luo, G.-L.; Huang, Y.-C.; Shen, Y.-L.; Ma, W.C.-Y.; Huang, K.-P.; Lin, K.-L.; Samukawa, S.; Li, Y.; Huang, G.-W.; Lee, Y.-J.; Li, J.-Y.; Wu, W.-F.; Shieh, J.-M.; Chao, T.-S.; Yeh, W.-K.; Wang, Y.-H.; JIUN-YUN LI; Sung, P.-J.;Chang, C.-Y.;Chen, L.-Y.;Kao, K.-H.;Su, C.-J.;Liao, T.-H.;Fang, C.-C.;Wang, C.-J.;Hong, T.-C.;Jao, C.-Y.;Hsu, H.-S.;Luo, S.-X.;Wang, Y.-S.;Huang, H.-F.;Li, J.-H.;Huang, Y.-C.;Hsueh, F.-K.;Wu, C.-T.;Huang, Y.-M.;Hou, F.-J.;Luo, G.-L.;Huang, Y.-C.;Shen, Y.-L.;Ma, W.C.-Y.;Huang, K.-P.;Lin, K.-L.;Samukawa, S.;Li, Y.;Huang, G.-W.;Lee, Y.-J.;Li, J.-Y.;Wu, W.-F.;Shieh, J.-M.;Chao, T.-S.;Yeh, W.-K.;Wang, Y.-H.; Sung, P.-J.; Hsueh, F.-K.; Huang, Y.-C.; Li, J.-H.; Huang, H.-F.; Chang, C.-Y.; Chen, L.-Y.; Kao, K.-H.; Su, C.-J.; Liao, T.-H.; Fang, C.-C.; Wang, C.-J.; Hong, T.-C.; Jao, C.-Y.; Hsu, H.-S.; Luo, S.-X.; Wang, Y.-S. |
| 臺大學術典藏 |
2020-06-11T06:20:28Z |
High Dopant Activation of Phosphorus in Strained and Relaxed GeSn by Rapid Thermal Annealing and Microwave Annealing
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Liu, J.-Y.;Chiu, P.-Y.;Chuang, Y.;Liu, C.-Y.;Luo, G.-L.;Li, J.-Y.; Liu, J.-Y.; Chiu, P.-Y.; Chuang, Y.; Liu, C.-Y.; Luo, G.-L.; Li, J.-Y.; JIUN-YUN LI |
| 臺大學術典藏 |
2020-06-11T06:20:28Z |
A High ION/IOFF Ratio of 6 × 105 in Germanium-Tin n+/p Junctions by Phosphorus Ion Implantation
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Liu, J.-Y.;Chuang, Y.;Liu, C.-Y.;Luo, G.-L.;Li, J.-Y.; Liu, J.-Y.; Chuang, Y.; Liu, C.-Y.; Luo, G.-L.; Li, J.-Y.; JIUN-YUN LI |
| 國立交通大學 |
2019-10-05T00:08:42Z |
Ge FinFET CMOS Inverters With Improved Channel Surface Roughness by Using In-Situ ALD Digital O-3 Treatment
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Yeh, M. -S.; Luo, G. -L.; Hou, F. -J.; Sung, P. -J.; Wang, C. -J.; Su, C. -J.; Wu, C. -T.; Huang, Y. -C.; Hong, T. -C.; Chao, T. -S.; Chen, B. -Y.; Chen, K. -M.; Wu, Y. -C.; Izawa, M.; Miura, M.; Morimoto, M.; Ishimura, H.; Lee, Y. -J.; Wu, W. -F.; Yeh, W. -K. |
| 國立交通大學 |
2019-04-02T06:04:37Z |
Voltage Transfer Characteristic Matching by Different Nanosheet Layer Numbers of Vertically Stacked Junctionless CMOS Inverter for SoP/3D-ICs applications
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Sung, P. -J.; Chang, C. -Y.; Chen, L. -Y.; Kao, K. -H.; Su, C. -J.; Liao, T. -H.; Fang, C. -C.; Wang, C. -J.; Hong, T. -C.; Jao, C. -Y.; Hsu, H. -S.; Luo, S. -X.; Wang, Y. -S.; Huang, H. -F.; Li, J. -H.; Huang, Y. -C.; Hsueh, F. -K.; Wu, C. -T.; Huang, Y. -M.; Hou, F. -J.; Luo, G. -L.; Shen, Y. -L.; Ma, W. C. -Y.; Huang, K. -P.; Lin, K. -L.; Samukawa, S.; Li, Y.; Huang, G. -W; Lee, Y. -J.; Li, J. -Y.; Wu, W. -F.; Shieh, J. -M.; Chao, T. -S.; Yeh, W. -K.; Wang, Y. -H. |
| 國立成功大學 |
2019 |
Voltage Transfer Characteristic Matching by Different Nanosheet Layer Numbers of Vertically Stacked Junctionless CMOS Inverter for SoP/3D-ICs applications
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Sung, P.-J.;Chang, Chang C.-Y.;Chen, L.-Y.;Kao, Kao K.-H.;Su, C.-J.;Liao, T.-H.;Fang, C.-C.;Wang, C.-J.;Hong, T.-C.;Jao, C.-Y.;Hsu, Hsu H.-S.;Luo, S.-X.;Wang, Y.-S.;Huang, Huang H.-F.;Li, J.-H.;Huang, Y.-C.;Hsueh, F.-K.;Wu, C.-T.;Huang, Y.-M.;Hou, F.-J.;Luo, G.-L.;Huang, Y.-C.;Shen, Y.-L.;Ma, W.C.-Y.;Huang, K.-P.;Lin, K.-L.;Samukawa, Samukawa S.;Li, Y.;Huang, G.-W.;Lee, Y.-J.;Li, J.-Y.;Wu, Wu W.-F.;Shieh, J.-M.;Chao, T.-S.;Yeh, W.-K.;Wang, Y.-H. |
显示项目 1-10 / 28 (共3页)
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