English  |  正體中文  |  简体中文  |  Total items :2814258  
Visitors :  27284448    Online Users :  376
Project Commissioned by the Ministry of Education
Project Executed by National Taiwan University Library
 
臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)
About TAIR

Browse By

News

Copyright

Related Links

"luo shien chun"

Return to Browse by Author
Sorting by Title Sort by Date

Showing items 1-5 of 5  (1 Page(s) Totally)
1 
View [10|25|50] records per page

Institution Date Title Author
國立交通大學 2016-03-28T00:05:45Z A 0.48V 0.57nJ/Pixel Video-Recording SoC in 65nm CMOS Lin, Tay-Jyi; Chien, Cheng-An; Chang, Pei-Yao; Chen, Ching-Wen; Wang, Po-Hao; Shyu, Ting-Yu; Chou, Chien-Yung; Luo, Shien-Chun; Guo, Jiun-In; Chen, Tien-Fu; Chuang, Gene C. H.; Chu, Yuan-Hua; Cheng, Liang-Chia; Su, Hong-Men; Jou, Chewnpu; Ieong, Meikei; Wu, Cheng-Wen; Wang, Jinn-Shyan
國立交通大學 2015-07-21T11:20:29Z Separate Clock Network Voltage for Correcting Random Errors in ULV Clocked Storage Cells Luo, Shien-Chun; Chang, Kuo-Chiang; Chen, Ming-Pin; Huang, Ching-Ji; Chiu, Yi-Fang; Chen, Po-Hsun; Cheng, Liang-Chia; Liu, Chih-Wei; Chu, Yuan-Hua
國立交通大學 2015-07-21T08:31:16Z An Ultra-Low Voltage Hearing Aid Chip using Variable-Latency Design Technique Chang, Kuo-Chiang; Luo, Shien-Chun; Huang, Ching-Ji; Liu, Chih-Wei; Chu, Yuan-Hua; Jou, Shyh-Jye
國立成功大學 2011-09-02 超低功率並具有製程變異意識之電路與儲存元件設計 羅賢君; Luo, Shien-Chun
國立成功大學 2009-11 Energy-Efficient Dual-Edge-Triggered Level Converting Flip Flops With Symmetry in Setup Times and Insensitivity to Output Parasitics Chiou, Lih-Yih; Luo, Shien-Chun

Showing items 1-5 of 5  (1 Page(s) Totally)
1 
View [10|25|50] records per page