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"marculescu d"
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| 臺大學術典藏 |
2018-09-10T08:42:37Z |
PRICE: Power reduction by placement and clock-network co-synthesis for pulsed-latch designs
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Chuang, Y.-L.;Lin, H.-T.;Ho, T.-Y.;Chang, Y.-W.;Marculescu, D.; Chuang, Y.-L.; Lin, H.-T.; Ho, T.-Y.; Chang, Y.-W.; Marculescu, D.; YAO-WEN CHANG |
| 臺大學術典藏 |
2018-09-10T08:42:37Z |
PRICE: Power reduction by placement and clock-network co-synthesis for pulsed-latch designs
|
Chuang, Y.-L.;Lin, H.-T.;Ho, T.-Y.;Chang, Y.-W.;Marculescu, D.; Chuang, Y.-L.; Lin, H.-T.; Ho, T.-Y.; Chang, Y.-W.; Marculescu, D.; YAO-WEN CHANG |
| 臺大學術典藏 |
2018-09-10T07:36:54Z |
Post-floorplanning power/ground ring synthesis for multiple-supply-voltage designs
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Lee, W.-P.;Marculescu, D.;Chang, Y.-W.; Lee, W.-P.; Marculescu, D.; Chang, Y.-W.; YAO-WEN CHANG |
| 臺大學術典藏 |
2018-09-10T07:36:54Z |
Post-floorplanning power/ground ring synthesis for multiple-supply-voltage designs
|
Lee, W.-P.;Marculescu, D.;Chang, Y.-W.; Lee, W.-P.; Marculescu, D.; Chang, Y.-W.; YAO-WEN CHANG |
| 臺大學術典藏 |
2012 |
Statistical thermal modeling and optimization considering leakage power variations
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Juan, D.-C.; Chuang, Y.-L.; Marculescu, D.; Chang, Y.-W.; YAO-WEN CHANG |
Showing items 1-5 of 5 (1 Page(s) Totally)
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