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"mrinal aryadeep"

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Institution Date Title Author
亞洲大學 201310 Design of a low on resistance high voltage (<100V) novel 3D NLDMOS with side STI and single P-top layer based on 0.18um BCD Process Technology Kumar, Ankit;Kumar, Ankit;Yulia, Emita;Hapsari, Emita Yulia;Kuma, Vasanth;Kumar, Vasanth;Mri, Aryadeep;Mrinal, Aryadeep;許健;Sheu, Gene;楊紹明;Yang, Shao-Ming;Ningar, Vivek;Ningaraju, Vivek
亞洲大學 2013-10 Effect of Trench Depth and Trench Angle in a High Voltage Polyflanked-Super junction MOSFET Kumar, Vijay;Srinat, Grama;Shreyas, Grama Srinath;Nidhi, Karuna;Nidhi, Karuna;Agarw, Neelam;Agarwal, Neelam;Kumar, Ankit;Kumar, Ankit;許健;Sheu, Gene;楊紹明;Yang, Shao-Ming;Mri, Aryadeep;Mrinal, Aryadeep

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