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"mukhopadhyay saibal"的相关文件
显示项目 1-6 / 6 (共1页)
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| 國立交通大學 |
2019-04-02T05:59:40Z |
SRAM Write-Ability Improvement With Transient Negative Bit-Line Voltage
|
Mukhopadhyay, Saibal; Rao, Rahul M.; Kim, Jae-Joon; Chuang, Ching-Te |
| 國立交通大學 |
2017-04-21T06:49:37Z |
Ring oscillator circuit structures for measurement of isolated NBTI/PBTI effects
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Kim, Jae-Joon; Rao, Rahul; Mukhopadhyay, Saibal; Chuang, Ching-Te |
| 國立交通大學 |
2017-04-21T06:48:49Z |
Pre-Si Estimation and Compensation of SRAM Layout Deficiencies to Achieve Target Performance and Yield
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Bansal, Aditya; Singh, Rama N.; Mukhopadhyay, Saibal; Han, Geng; Heng, Fook-Luen; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:42:37Z |
An on-chip test structure and digital measurement method for statistical characterization of local random variability in a process
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Mukhopadhyay, Saibal; Kim, Keunwoo; Jenkins, Keith A.; Chuang, Ching-Te; Roy, Kaushik |
| 國立交通大學 |
2014-12-08T15:38:09Z |
SRAM Write-Ability Improvement With Transient Negative Bit-Line Voltage
|
Mukhopadhyay, Saibal; Rao, Rahul M.; Kim, Jae-Joon; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:09:50Z |
Design of Sub-90 nm Low-Power and Variation Tolerant PD/SOI SRAM Cell Based on Dynamic Stability Metrics
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Joshi, Rajiv V.; Mukhopadhyay, Saibal; Plass, Donald W.; Chan, Yuen H.; Chuang, Ching-Te; Tan, Yue |
显示项目 1-6 / 6 (共1页)
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