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"ni chia lung"的相關文件
顯示項目 1-12 / 12 (共1頁)
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| 國立交通大學 |
2017-04-21T06:48:20Z |
Automatic Loading Detection (ALD) Technique for 92% High Efficiency Interleaving Power Factor Correction (PFC) Over a Wide Output Power of 180W
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Tsai, Jen-Chive; Chen, Chun-Yen; Chen, Yi-Ting; Ni, Chia-Lung; Su, Yi-Ping; Chen, Ke-Horng; Chen, Yu-Wen; Liang, Chao-Chiun; Ho, Chang-An; Yu, Tun-Hao |
| 國立交通大學 |
2015-07-21T08:29:37Z |
Time-Shift Current Balance Technique in Four-Phase Voltage Regulator Module with 90% Efficiency for Cloud Computing
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Su, Yi-Ping; Chen, Wei-Chung; Huang, Yu-Ping; Chen, Chun-Yen; Ni, Chia-Lung; Chen, Ke-Horng |
| 國立交通大學 |
2014-12-12T01:55:38Z |
具有線電壓重建及總諧波失真最佳化以達到0.99功率因數及1.7%總諧波失真之功率因數校正控制器
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倪嘉隆; Ni, Chia-Lung; 陳科宏; Chen, Ke-Horng |
| 國立交通大學 |
2014-12-08T15:35:45Z |
High-PF and Ultra-Low-THD Power Factor Correction Controller by Sinusoidal-Wave Synthesis and Optimized THD Control
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Chang, Chih-Wei; Ni, Chia-Lung; Tsai, Jen-Chieh; Chen, Yi-Ting; Chen, Chun-Yen; Chen, Ke-Horng; Chen, Long-Der; Yang, Cheng-Chen |
| 國立交通大學 |
2014-12-08T15:34:55Z |
Boundary Conduction Mode Controlled Power Factor Corrector With Line Voltage Recovery and Total Harmonic Distortion Improvement Techniques
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Su, Yi-Ping; Ni, Chia-Lung; Chen, Chun-Yen; Chen, Yi-Ting; Tsai, Jen-Chieh; Chen, Ke-Horng |
| 國立交通大學 |
2014-12-08T15:30:55Z |
92% High Efficiency and Low Current Mismatch Interleaving Power Factor Correction Controller With Variable Sampling Slope and Automatic Loading Detection Techniques
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Su, Yi-Ping; Chen, Chun-Yen; Ni, Chia-Lung; Kang, Yu-Chai; Chen, Yi-Ting; Tsai, Jen-Chieh; Chen, Ke-Horng; Wang, Shih-Ming; Liang, Chao-Chiun; Ho, Chang-An; Yu, Tun-Hao |
| 國立交通大學 |
2014-12-08T15:30:05Z |
Triple Loop Modulation (TLM) for High Reliability and Efficiency in Power Factor Correction (PFC) System
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Tsai, Jen-Chieh; Ni, Chia-Lung; Chen, Chun-Yen; Chen, Yi-Ting; Chen, Chi-Lin; Chen, Ke-Horng |
| 國立交通大學 |
2014-12-08T15:29:36Z |
Perturbation On-Time (POT) Technique in Power Factor Correction (PFC) Controller for Low Total Harmonic Distortion and High Power Factor
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Tsai, Jen-Chieh; Chen, Chi-Lin; Chen, Yi-Ting; Ni, Chia-Lung; Chen, Chun-Yen; Chen, Ke-Horng |
| 國立交通大學 |
2014-12-08T15:29:22Z |
Triple Loop Modulation (TLM) for High Reliability and Efficiency in a Power Factor Correction (PFC) System
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Tsai, Jen-Chieh; Ni, Chia-Lung; Chen, Chi-Lin; Chen, Yi-Ting; Chen, Chun-Yen; Chen, Ke-Horng |
| 國立交通大學 |
2014-12-08T15:29:03Z |
Variable Sampling Slope (VSS) and No-Deadtime Ramp Generator (NDRG) Techniques for Closed-Loop Interleaving Power Factor Correction (PFC) Design with Suppression of Current Mismatch
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Chen, Chun-Yen; Peng, Ruei Hong; Tsai, Jen-Chieh; Kang, Yu-Chi; Ni, Chia-Lung; Chen, Yi-Ting; Chen, Ke-Horng; Wang, Shih-Ming; Lee, Ming-Wei; Luo, Hsin-Yu |
| 國立交通大學 |
2014-12-08T15:20:29Z |
Perturbation On-time (POT) Control and Inhibit Time Control (ITC) in Suppression of THD of Power Factor Correction (PFC) Design
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Tsai, Jen-Chieh; Chen, Chi-Lin; Chen, Yi-Ting; Ni, Chia-Lung; Chen, Chun-Yen; Chen, Ke-Horng; Chen, Chih-Jen; Pan, Heng-Lin |
| 國立交通大學 |
2014-12-08T15:20:29Z |
800V Ultra-High-Voltage Start-up Mechanism for Pre-regulator in Power Factor Correction (PFC) Controller
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Chen, Chi-Lin; Tsai, Jen-Chieh; Chen, Yi-Ting; Ni, Chia-Lung; Chen, Chun-Yen; Chen, Ke-Horng |
顯示項目 1-12 / 12 (共1頁)
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