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教育部委託研究計畫      計畫執行:國立臺灣大學圖書館
 
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機構 日期 題名 作者
國立交通大學 2020-10-05T01:59:50Z Energy Transformation Between the Inductor and the Power Transistor for the Unclamped Inductive Switching (UIS) Test Nidhi, Karuna; Lee, Jian-Hsing; Huang, Shao-Chang; Ker, Ming-Dou
國立交通大學 2019-08-02T02:24:21Z Package and Chip Accelerated Aging Methods for Power MOSFET Reliability Evaluation Lin, Tingyou; Su, Chauchin; Hung, Chung-Chih; Nidhi, Karuna; Tu, Chily; Huang, Shao-Chang
國立交通大學 2019-08-02T02:15:29Z Avalanche Ruggedness Capability and Improvement of 5-V n-Channel Large-Array MOSFET in BCD Process Nidhi, Karuna; Ker, Ming-Dou; Lee, Jian-Hsing; Huang, Shao-Chang
國立交通大學 2018-08-21T05:54:11Z A CMOS-Process-Compatible Low-Voltage Junction-FET With Adjustable Pinch-Off Voltage Nidhi, Karuna; Ker, Ming-Dou
國立交通大學 2018-08-21T05:53:47Z Improving Safe-Operating-Area o f a 5-V n-Channel Large Array MOSFET in a 0.15-mu m BCD Process Nidhi, Karuna; Ker, Ming-Dou; Lin, Tingyou; Lee, Jian-Hsing
亞洲大學 201310 Effect of Trench Depth and Trench Angle in a High Voltage Polyflanked-Super junction MOSFET Kumar, Vijay;Srinat, Grama;Shreyas, Grama Srinath;Nidhi, Karuna;Nidhi, Karuna;Agarw, Neelam;Agarwal, Neelam;Kumar, Ankit;Kumar, Ankit;許健;Sheu, Gene;楊紹明;Yang, Shao-Ming;Mri, Aryadeep;Mrinal, Aryadeep
亞洲大學 201306 Unclamped Inductive Switching Stress Failure Mechanism of LDMOS Kumar, Vijay;Srinat, Grama;Shreyas, Grama Srinath;Khau, Chinmoy;Khaund, Chinmoy;Agarw, Neelam;Agarwal, Neelam;Nidhi, Karuna;Nidhi, Karuna;楊紹明;Yang, Shao-Ming;許健;Sheu, Gene
亞洲大學 2013-10 Effect of Trench Depth and Trench Angle in a High Voltage Polyflanked-Super junction MOSFET Kumar, Vijay;Srinat, Grama;Shreyas, Grama Srinath;Nidhi, Karuna;Nidhi, Karuna;Agarw, Neelam;Agarwal, Neelam;Kumar, Ankit;Kumar, Ankit;許健;Sheu, Gene;楊紹明;Yang, Shao-Ming;Mri, Aryadeep;Mrinal, Aryadeep
亞洲大學 2012 Unclamped Inductive Switching (UIS) test- A Power MOSFET Reliability Study for Multi-finger Devices Nidhi, Karuna

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