|
English
|
正體中文
|
简体中文
|
Total items :2808724
|
|
Visitors :
26803121
Online Users :
898
Project Commissioned by the Ministry of Education
Project Executed by National Taiwan University Library
|
|
|
|
Taiwan Academic Institutional Repository >
Browse by Author
|
"nieh yow tyng"
Showing items 1-4 of 4 (1 Page(s) Totally)
1
View [10|25|50] records per page
| 中原大學 |
2002-08 |
Clock Period Minimization by Incorporating Clock Skew Scheduling and Gate-Level Delay Insertion
|
Huang, Shih-Hsu;Nieh, Yow-Tyng |
| 中原大學 |
2003-12 |
Clock Skew Scheduling for Peak Current Minimization
|
Chang, Chia-Ming;Huang, Shih-Hsu;Nieh, Yow-Tyng |
| 中原大學 |
2003-08 |
Process-Variation-Tolerant Clock Tree Design Methodology
|
Huang, Shih-Hsu;Lin, Yu-Hui;Nieh, Yow-Tyng |
| 中原大學 |
2006-08 |
Register Binding for Clock Skew Optimization
|
Huang, Shih-Hsu;Cheng, Chun-Hua;Nieh, Yow-Tyng;Yu, Wei-Chieh |
Showing items 1-4 of 4 (1 Page(s) Totally)
1
View [10|25|50] records per page
|
