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Showing items 1-4 of 4 (1 Page(s) Totally)
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| 國立臺灣科技大學 |
2017 |
Electrical tests for capacitive open defects in assembled PCBs
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Alia, F.A.B.;Odoriba, A.;Hashizume, M.;Yotsuyanagi, H.;Lu, S.-K. |
| 國立臺灣科技大學 |
2016 |
A built-in defective level monitor of resistive open defects in 3D ICs with logic gates
|
Hashizume, M;Odoriba, A;Yotsuyanagi, H;Lu, S.-K. |
| 國立臺灣科技大學 |
2015 |
Electrical interconnect test of 3D ICs made of dies without ESD protection circuits with a built-in test circuit
|
Nanbara, K.;Odoriba, A.;Hashizume, M.;Yotsuyanagi, H.;Lu, S.-K. |
| 國立臺灣科技大學 |
2015 |
A testable design for electrical interconnect tests of 3D ICs
|
Odoriba, A.;Umezu, S.;Hashizume, M.;Yotsuyanagi, H.;Ali, F.A.B.;Lu, S.-K. |
Showing items 1-4 of 4 (1 Page(s) Totally)
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