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Showing items 1-7 of 7 (1 Page(s) Totally)
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| 臺大學術典藏 |
2020-06-11T06:14:08Z |
Parallel programmable video co-processor design.
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Wu, An-Yeu; Liu, K. J. Ray; Raghupathy, Arun; Liu, Shang-Chieh; AN-YEU(ANDY) WU; Wu, An-Yeu;Liu, K. J. Ray;Raghupathy, Arun;Liu, Shang-Chieh |
| 臺大學術典藏 |
2018-09-10T05:59:23Z |
Low-power design methodology for DSP systems using multirate approach
|
Wu, An-Yeu; Ray Liu, K.J.; Zhang, Zhongying; Nakajima, Kazuo; Raghupathy, Arun; AN-YEU(ANDY) WU; Wu, An-Yeu;Ray Liu, K.J.;Zhang, Zhongying;Nakajima, Kazuo;Raghupathy, Arun |
| 臺大學術典藏 |
2018-09-10T05:59:23Z |
Low-power design methodology for DSP systems using multirate approach
|
Wu, An-Yeu; Ray Liu, K.J.; Zhang, Zhongying; Nakajima, Kazuo; Raghupathy, Arun; AN-YEU(ANDY) WU; Wu, An-Yeu;Ray Liu, K.J.;Zhang, Zhongying;Nakajima, Kazuo;Raghupathy, Arun |
| 臺大學術典藏 |
2018-09-10T05:24:16Z |
Algorithm-based low-power DSP system design: Methodology and verification
|
Wu, An-Yeu;Liu, K.J.Ray;Zhang, Zhongying;Nakajima, Kazuo;Raghupathy, Arun;Liu, Shang-Chieh; Wu, An-Yeu; Liu, K.J.Ray; Zhang, Zhongying; Nakajima, Kazuo; Raghupathy, Arun; Liu, Shang-Chieh; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T05:24:16Z |
Algorithm-based low-power DSP system design: Methodology and verification
|
Wu, An-Yeu;Liu, K.J.Ray;Zhang, Zhongying;Nakajima, Kazuo;Raghupathy, Arun;Liu, Shang-Chieh; Wu, An-Yeu; Liu, K.J.Ray; Zhang, Zhongying; Nakajima, Kazuo; Raghupathy, Arun; Liu, Shang-Chieh; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
1996 |
Parallel programmable video co-processor design
|
Wu, An-Yeu; Ray Liu, K.J.; Raghupathy, Arun; Liu, Shang-Chieh; AN-YEU(ANDY) WU; Wu, An-Yeu;Ray Liu, K.J.;Raghupathy, Arun;Liu, Shang-Chieh |
| 臺大學術典藏 |
1996 |
Parallel programmable video co-processor design
|
Wu, An-Yeu; Ray Liu, K.J.; Raghupathy, Arun; Liu, Shang-Chieh; AN-YEU(ANDY) WU; Wu, An-Yeu;Ray Liu, K.J.;Raghupathy, Arun;Liu, Shang-Chieh |
Showing items 1-7 of 7 (1 Page(s) Totally)
1
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