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Showing items 46-55 of 115  (12 Page(s) Totally)
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Institution Date Title Author
國立臺灣科技大學 2015 FPGA implementation of automatic speech recognition system in a car environment Syu, D.-F;Syu, Syu S.-W;Ruan, S.-J;Huang, Y.-C;Yang, C.-K.
國立臺灣科技大學 2015 A low complexity depth map compression approach for Microsoft Kinect devices Panjaitan, C;Shen, C.-A;Ruan, S.-J.
國立臺灣科技大學 2014 Adaptive thresholding algorithm: Efficient computation technique based on 2-d intelligent block detection for degraded images Hung, C.-S.;Ruan, S.-J.
國立臺灣科技大學 2014 Rule-based redundant via-aware standard cell design considering multiple via configuration Kan, T.-C.;Chen, Y.-J.;Hong, H.-M.;Ruan, S.-J.
國立臺灣科技大學 2014 Image binarization based on 2D intelligent block detection Hung, C.-S.;Ruan, S.-J.
東海大學 2013-03-04 A low power detection routing method for bufferless NoC Hsu, C.-K.; Tsai, K.-L.; Jheng, J.-F.; Ruan, S.-J.; Shen, C.-A.
國立臺灣科技大學 2013 Histogram shrinking for power-saving contrast enhancement Peng, Y.-T.;Cheng, F.-C.;Jan, L.-M.;Ruan, S.-J.
國立臺灣科技大學 2013 Configurable redundant via-aware standard cell design considering multi-via mechanism Kan, T.-C.;Hong, H.-M.;Chen, Y.-J.;Ruan, S.-J.
國立臺灣科技大學 2013 A low power detection routing method for bufferless NoC Hsu, C.-K.;Tsai, K.-L.;Jheng, J.-F.;Ruan, S.-J.;Shen, C.-A.
國立臺灣科技大學 2013 Reliability consideration with rectangle- and double-signal through silicon vias insertion in 3D thermal-aware floorplanning Hsu, C.-H.;Ruan, S.-J.;Chen, Y.-J.;Kan, T.-C.

Showing items 46-55 of 115  (12 Page(s) Totally)
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