臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)

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Institution	Date	Title	Author
臺大學術典藏	2020-05-04T08:21:25Z	Total Exchange on a Reconfigurable Parallel Architecture.	YUH-DAUH LYUU; Schenfeld, Eugen; Lyuu, Yuh-Dauh
臺大學術典藏	2020-05-04T08:21:25Z	Parallel Graph Contraction with Applications to a Reconfigurable Parallel Architecture.	Lyuu, Yuh-Dauh;Schenfeld, Eugen; Lyuu, Yuh-Dauh; Schenfeld, Eugen; YUH-DAUH LYUU
臺大學術典藏	2018-09-10T05:29:47Z	MICA: A mapped interconnection-cached architecture	Lyuu, Yuh-Dauh;Schenfeld, Eugen; Lyuu, Yuh-Dauh; Schenfeld, Eugen; YUH-DAUH LYUU
國立臺灣大學	1997-05	New Algorithms for Matrix Operations with Applications to a Reconfigurable Parallel Architecture	Lyuu, Yuh Dauh; Schenfeld, Eugen
臺大學術典藏	1997-05	New Algorithms for Matrix Operations with Applications to a Reconfigurable Parallel Architecture	Schenfeld, Eugen; Lyuu, Yuh Dauh; Lyuu, Yuh Dauh
國立臺灣大學	1995-01	MICA:a Mapped Interconnection Cached Architecture	呂育道; Schenfeld, Eugen
臺大學術典藏	1995-01	MICA:a Mapped Interconnection Cached Architecture	呂育道; Schenfeld, Eugen; 呂育道; Schenfeld, Eugen
國立臺灣大學	1995	MICA:a Mapped Interconnection Cached Architecture	呂育道; Schenfeld, Eugen; Lyuu, Yuh-Dauh; Schenfeld, Eugen
國立臺灣大學	1994	New Algorithms for Matrix Operations with Applications to a Reconfigurable Parallel Architecture	呂育道; Schenfeld, Eugen; Lyuu, Yuh-Dauh; Schenfeld, Eugen
國立臺灣大學	1994	Parallel Contraction with Applications to a Reconfigurable Parallel Architecture	呂育道; Schenfeld, Eugen; Lyuu, Yuh-Dauh; Schenfeld, Eugen
臺大學術典藏	1994	New Algorithms for Matrix Operations with Applications to a Reconfigurable Parallel Architecture	Schenfeld, Eugen; Lyuu, Yuh-Dauh; 呂育道; Schenfeld, Eugen; Lyuu, Yuh-Dauh
臺大學術典藏	1994	Parallel Contraction with Applications to a Reconfigurable Parallel Architecture	Schenfeld, Eugen; Lyuu, Yuh-Dauh; Schenfeld, Eugen; 呂育道; Schenfeld, Eugen; Lyuu, Yuh-Dauh; Schenfeld, Eugen
國立臺灣大學	1993	Total Exchange on a Reconfigurable Parallel Architecture	呂育道; Schenfeld, Eugen; Lyuu, Yuh-Dauh; Schenfeld, Eugen
臺大學術典藏	1993	Total exchange on a reconfigurable parallel architecture	Lyuu, Yuh-Dauh;Schenfeld, Eugen; Lyuu, Yuh-Dauh; Schenfeld, Eugen; YUH-DAUH LYUU

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