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"shen fu hsiao"

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Institution	Date	Title	Author
國立中山大學	2001-09	Design of a CORDIC-Based Sin/Cos Intellectual Property Using Predictable Sign Bits	Tso-Bing Juan; Chau-Chuang Huang; Shen-Fu Hsiao
國立中山大學	2001-08	Novel High-Performance and Area-Efficient D-Flip-Flop Circuits	Ming-Yu Tsai; Tso-Bing Juang; Shen-Fu Hsiao
國立中山大學	2001-08	A Multiplier-Based Arithmetic Function Generator for Digital Signal Processing Applications	Shen-Fu Hsiao; Tso-Bing Juang; Jeng Hsium Jan; Ming Yu Tsai
國立中山大學	2001-07	Parallel, Pipelined and Folded Architectures for Computation of 1-D and 2-D DCT in Image and Video Coding	Shen-Fu Hsiao;Jia-Ming Tseng
國立中山大學	2000-12	Robust Spatial-Domain Watermarking Methods Based on a Weighting Table with Fine Tune Technique	Mu-San Chung; Kai-Hsiang Chang; Shen-Fu Hsiao
國立中山大學	2000-11	Design of Low-Cost and High-Throughput Linear Arrays for DFT Computations: Algorithms, Architectures and Implementations	Shen-Fu Hsiao;Wei-Ren Shiue
國立中山大學	2000-10	Design and Implementation of a Novel Linear-Array DCT/IDCT Processor with Complexity of Order logN	Shen-Fu Hsiao;Wei-Ren Shiue;Jian-Ming Tseng
國立中山大學	2000-08	VLSI Design of an Efficient Embedded Zerotree Wavelet Coder with Function of Digital Watermarking	Shen-Fu Hsiao;Yor-Chin Tai;Kai-Hsiang Chang
國立中山大學	2000-08	CORDIC-Based Signed-Bit Predictable SIN/COS Generator	Chao-Chuan Huang; Tso-Bing Juan; Shen-Fu Hsiao
國立中山大學	2000-07	Design of a Unified Arithmetic Processor Based on Redundant Constant-Factor CORDIC with Merged Scaling Operation	Shen-Fu Hsiao;Chun-Yi Lau
國立中山大學	2000-06	Redunant Constant-Factor Implementation of Multi-dimensional CORDIC and Its Application to Complex SVD	Shen-Fu Hsiao;Chun-Yi Lau;Jean-Marc Delosme
國立中山大學	2000-06	VLSI Design of an Efficient Embedded Zerotree Wavelet Coder with Function of Digital Watermarking	Shen-Fu Hsiao; Yor-Chin Tai; Kai-Hsiang Chang
國立中山大學	2000-06	Low-Cost Unified Architectures for the Computation of Discrete Trigonometric Transforms	Shen-Fu Hsiao; Wei-Ren Shiue
國立中山大學	2000-05	High-Performance Multiplexer-Based Logic Synthesis Using Pass-Transistor Logic	Shen-Fu Hsiao; Jia-Siang Yeh; Da-Yen Chen
國立中山大學	2000-02	Discussions on the CORDIC Processor Using Leading Zero Detectors	Tso-Bing Juang; Shen-Fu Hsiao
國立中山大學	2000-01	An Efficient Synthesizer for Generation of Fast Parallel Multipliers	Shen-Fu Hsiao;Ming-Rong Jiang
國立中山大學	1999-08	A Cost-Efficient and Fully-Pipelinable Linear Architecture for Discrete Cosine Transform	Shen-Fu Hsiao;Wei-Ren Shiue;Jian-Ming Tseng
國立中山大學	1999-08	Direct Implementation of N x N 2-D DCT on a Pipelinable Linear-Array without Intermediate Transpose Memory	Shen-Fu Hsiao; Jian-Ming Tseng
國立中山大學	1999-08	A High-Speed Universal Arithmetic Processor Based on Redundant CORDIC with Constant Scaling Factor and Merged Scaling Operation	Shen-Fu Hsiao; Chun-Yi Lau
國立中山大學	1999-08	A Low Power and Fast CORDIC Processor for Vector Rotation	Tso-Bing Juang; Shen-Fu Hsiao
國立中山大學	1999-08	Direct Implementation of 2-D DCT on a Low-Cost Linear-Array Architecture without Intermediate Transpose Memory	Shen-Fu Hsiao; Jian-Ming Tseng
國立中山大學	1999-06	An Efficient Synthesizer for Generation of Fast Parallel Multipliers	Shen-Fu Hsiao; Ming-Rong Jiang
國立中山大學	1999-06	A Cost-Efficient and Fully-Pipelinable Linear Architecture for Discrete Cosine Transform	Shen-Fu Hsiao; Wei-Ren Shiue; Jian-Ming Tseng
國立中山大學	1999-05	A High-Speed Constant-Factor Redundant CORDIC Processor without Extra Correcting or Scaling Iterations	Shen-Fu Hsiao
國立中山大學	1999-03	New Hardware-Efficient Algorithms and Architectures for Computation of 2-D DCT on Linear Systolic Arrays	Shen-Fu Hsiao; Wei-Ren Shiue

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